JP5481701B2 - 電子装置および電子装置の製造方法 - Google Patents

電子装置および電子装置の製造方法 Download PDF

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Publication number
JP5481701B2
JP5481701B2 JP2009145946A JP2009145946A JP5481701B2 JP 5481701 B2 JP5481701 B2 JP 5481701B2 JP 2009145946 A JP2009145946 A JP 2009145946A JP 2009145946 A JP2009145946 A JP 2009145946A JP 5481701 B2 JP5481701 B2 JP 5481701B2
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Japan
Prior art keywords
substrate
electronic device
bonding material
electrode post
electrode
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
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JP2009145946A
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English (en)
Japanese (ja)
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JP2011003749A5 (https=
JP2011003749A (ja
Inventor
孝 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Priority to JP2009145946A priority Critical patent/JP5481701B2/ja
Publication of JP2011003749A publication Critical patent/JP2011003749A/ja
Publication of JP2011003749A5 publication Critical patent/JP2011003749A5/ja
Application granted granted Critical
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/63—Vias, e.g. via plugs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2009145946A 2009-06-19 2009-06-19 電子装置および電子装置の製造方法 Active JP5481701B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009145946A JP5481701B2 (ja) 2009-06-19 2009-06-19 電子装置および電子装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009145946A JP5481701B2 (ja) 2009-06-19 2009-06-19 電子装置および電子装置の製造方法

Publications (3)

Publication Number Publication Date
JP2011003749A JP2011003749A (ja) 2011-01-06
JP2011003749A5 JP2011003749A5 (https=) 2012-07-12
JP5481701B2 true JP5481701B2 (ja) 2014-04-23

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ID=43561465

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JP2009145946A Active JP5481701B2 (ja) 2009-06-19 2009-06-19 電子装置および電子装置の製造方法

Country Status (1)

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JP (1) JP5481701B2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6036739B2 (ja) * 2014-04-04 2016-11-30 株式会社村田製作所 モジュールおよびその製造方法
US11728307B2 (en) * 2021-04-21 2023-08-15 Micron Technology, Inc. Semiconductor interconnect structures with conductive elements, and associated systems and methods

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5120266B6 (ja) * 2007-01-31 2018-06-27 富士通セミコンダクター株式会社 半導体装置及びその製造方法

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Publication number Publication date
JP2011003749A (ja) 2011-01-06

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