JP5419547B2 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

Info

Publication number
JP5419547B2
JP5419547B2 JP2009128531A JP2009128531A JP5419547B2 JP 5419547 B2 JP5419547 B2 JP 5419547B2 JP 2009128531 A JP2009128531 A JP 2009128531A JP 2009128531 A JP2009128531 A JP 2009128531A JP 5419547 B2 JP5419547 B2 JP 5419547B2
Authority
JP
Japan
Prior art keywords
layer
barrier metal
semiconductor substrate
semiconductor device
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2009128531A
Other languages
English (en)
Japanese (ja)
Other versions
JP2010278181A (ja
JP2010278181A5 (enExample
Inventor
啓 村山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2009128531A priority Critical patent/JP5419547B2/ja
Priority to US12/752,736 priority patent/US8598684B2/en
Publication of JP2010278181A publication Critical patent/JP2010278181A/ja
Publication of JP2010278181A5 publication Critical patent/JP2010278181A5/ja
Application granted granted Critical
Publication of JP5419547B2 publication Critical patent/JP5419547B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
JP2009128531A 2009-04-06 2009-05-28 半導体装置及びその製造方法 Active JP5419547B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009128531A JP5419547B2 (ja) 2009-05-28 2009-05-28 半導体装置及びその製造方法
US12/752,736 US8598684B2 (en) 2009-04-06 2010-04-01 Semiconductor device, and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009128531A JP5419547B2 (ja) 2009-05-28 2009-05-28 半導体装置及びその製造方法

Publications (3)

Publication Number Publication Date
JP2010278181A JP2010278181A (ja) 2010-12-09
JP2010278181A5 JP2010278181A5 (enExample) 2012-03-29
JP5419547B2 true JP5419547B2 (ja) 2014-02-19

Family

ID=43424885

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009128531A Active JP5419547B2 (ja) 2009-04-06 2009-05-28 半導体装置及びその製造方法

Country Status (1)

Country Link
JP (1) JP5419547B2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101758617B1 (ko) 2011-02-15 2017-07-18 에스케이하이닉스 주식회사 반도체 소자의 제조방법
KR101278442B1 (ko) 2012-01-19 2013-07-01 한국과학기술원 관통 실리콘 비아를 이용한 수동 이퀄라이저를 구비하는 인터포저, 그 제조 방법, 인터포저를 포함하는 적층 칩 패키지, 및 그 제조 방법
JP5934752B2 (ja) * 2014-07-01 2016-06-15 有限会社 ナプラ 集積回路装置
JP6881066B2 (ja) * 2017-06-19 2021-06-02 大日本印刷株式会社 貫通電極基板および貫通電極基板の製造方法
JP7341927B2 (ja) * 2020-03-12 2023-09-11 キオクシア株式会社 半導体記憶装置
WO2023228704A1 (ja) * 2022-05-27 2023-11-30 ソニーセミコンダクタソリューションズ株式会社 半導体デバイス、電子機器、および製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4131648B2 (ja) * 2002-07-10 2008-08-13 株式会社東芝 半導体装置および半導体装置の製造方法
JP4327644B2 (ja) * 2004-03-31 2009-09-09 Necエレクトロニクス株式会社 半導体装置の製造方法
JP2006278646A (ja) * 2005-03-29 2006-10-12 Sanyo Electric Co Ltd 半導体装置の製造方法
JP5394617B2 (ja) * 2006-06-16 2014-01-22 新光電気工業株式会社 半導体装置及び半導体装置の製造方法及び基板

Also Published As

Publication number Publication date
JP2010278181A (ja) 2010-12-09

Similar Documents

Publication Publication Date Title
JP5419547B2 (ja) 半導体装置及びその製造方法
US7932602B2 (en) Metal sealed wafer level CSP
CN101009247B (zh) 多层半导体器件及其制造方法
CN103296007B (zh) 用于传导垫的保护层及其形成方法
JP2002270608A (ja) 半導体集積回路装置とその製造方法
JP5419525B2 (ja) 半導体装置及びその製造方法
US6117792A (en) Method for manufacturing semiconductor device
US8598684B2 (en) Semiconductor device, and method of manufacturing the same
KR100469913B1 (ko) 반도체소자의 제조방법
US20050032320A1 (en) Method for manufacturing a semiconductor device and a semiconductor device manufactured thereby
JP2002246556A (ja) 半導体装置及びその製造方法
JP2010278181A5 (enExample)
US20100019390A1 (en) Semiconductor device, semiconductor chip, manufacturing methods thereof, and stack package
US6204128B1 (en) Method for fabricating semiconductor device
US20080277722A1 (en) Semiconductor device and method of manufacturing the semiconductor device
US8384150B2 (en) Vertical double diffused MOS transistor with a trench gate structure
US20150091021A1 (en) Method of Manufacturing Semiconductor Device and the Semiconductor Device
KR20060049348A (ko) 반도체장치
JP3295393B2 (ja) 半導体装置の製造方法
JP5220988B2 (ja) 半導体装置
US12255135B2 (en) Semiconductor device
CN100508181C (zh) 半导体器件
US7566594B2 (en) Fabricating method of semiconductor device
JP2005136270A (ja) 縦型mosfetを備えた半導体装置
JP2012028695A (ja) 半導体装置の製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20120215

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120215

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20130926

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20131001

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20131025

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20131112

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20131119

R150 Certificate of patent or registration of utility model

Ref document number: 5419547

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150