JP5397215B2 - 半導体製造装置、半導体装置の製造方法、シミュレーション装置及びシミュレーションプログラム - Google Patents

半導体製造装置、半導体装置の製造方法、シミュレーション装置及びシミュレーションプログラム Download PDF

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JP5397215B2
JP5397215B2 JP2009293839A JP2009293839A JP5397215B2 JP 5397215 B2 JP5397215 B2 JP 5397215B2 JP 2009293839 A JP2009293839 A JP 2009293839A JP 2009293839 A JP2009293839 A JP 2009293839A JP 5397215 B2 JP5397215 B2 JP 5397215B2
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JP2011134927A5 (enExample
JP2011134927A (ja
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信行 久保井
哲也 辰巳
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Sony Corp
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Sony Corp
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Priority to JP2009293839A priority Critical patent/JP5397215B2/ja
Priority to TW99139808A priority patent/TWI469214B/zh
Priority to KR1020100122501A priority patent/KR20110074665A/ko
Priority to US12/962,816 priority patent/US8649893B2/en
Priority to CN201010593711.6A priority patent/CN102136412B/zh
Publication of JP2011134927A publication Critical patent/JP2011134927A/ja
Publication of JP2011134927A5 publication Critical patent/JP2011134927A5/ja
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32458—Vessel
    • H01J37/32522—Temperature
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32917—Plasma diagnostics
    • H01J37/32935—Monitoring and controlling tubes by information coming from the object and/or discharge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32917—Plasma diagnostics
    • H01J37/32935—Monitoring and controlling tubes by information coming from the object and/or discharge
    • H01J37/32972—Spectral analysis
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Drying Of Semiconductors (AREA)
  • Plasma Technology (AREA)
  • Chemical Vapour Deposition (AREA)
JP2009293839A 2009-12-25 2009-12-25 半導体製造装置、半導体装置の製造方法、シミュレーション装置及びシミュレーションプログラム Active JP5397215B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2009293839A JP5397215B2 (ja) 2009-12-25 2009-12-25 半導体製造装置、半導体装置の製造方法、シミュレーション装置及びシミュレーションプログラム
TW99139808A TWI469214B (zh) 2009-12-25 2010-11-18 半導體製造裝置，半導體裝置製造方法，模擬裝置及模擬程式
KR1020100122501A KR20110074665A (ko) 2009-12-25 2010-12-03 반도체 제조 장치, 반도체 장치의 제조 방법, 시뮬레이션 장치 및 시뮬레이션 프로그램
US12/962,816 US8649893B2 (en) 2009-12-25 2010-12-08 Semiconductor manufacturing device, semiconductor device manufacturing method, simulation device, and simulation program
CN201010593711.6A CN102136412B (zh) 2009-12-25 2010-12-17 半导体制造装置和半导体器件制造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009293839A JP5397215B2 (ja) 2009-12-25 2009-12-25 半導体製造装置、半導体装置の製造方法、シミュレーション装置及びシミュレーションプログラム

Publications (3)

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JP2011134927A JP2011134927A (ja) 2011-07-07
JP2011134927A5 JP2011134927A5 (enExample) 2013-02-14
JP5397215B2 true JP5397215B2 (ja) 2014-01-22

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US (1) US8649893B2 (enExample)
JP (1) JP5397215B2 (enExample)
KR (1) KR20110074665A (enExample)
CN (1) CN102136412B (enExample)
TW (1) TWI469214B (enExample)

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US9002498B2 (en) * 2012-02-02 2015-04-07 Taiwan Semiconductor Manufacturing Co., Ltd. Tool function to improve fab process in semiconductor manufacturing
US9478408B2 (en) 2014-06-06 2016-10-25 Lam Research Corporation Systems and methods for removing particles from a substrate processing chamber using RF plasma cycling and purging
US10047438B2 (en) 2014-06-10 2018-08-14 Lam Research Corporation Defect control and stability of DC bias in RF plasma-based substrate processing systems using molecular reactive purge gas
US10081869B2 (en) 2014-06-10 2018-09-25 Lam Research Corporation Defect control in RF plasma substrate processing systems using DC bias voltage during movement of substrates
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US11233593B2 (en) * 2018-12-11 2022-01-25 At&T Intellectual Property I, L.P. Signal strength prediction based on line of sight analysis
US11840757B2 (en) * 2020-07-08 2023-12-12 Tdk Corporation Film deposition system, factory system, and method of depositing film on wafer

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Also Published As

Publication number Publication date
TWI469214B (zh) 2015-01-11
TW201126599A (en) 2011-08-01
CN102136412B (zh) 2014-10-08
KR20110074665A (ko) 2011-07-01
CN102136412A (zh) 2011-07-27
US8649893B2 (en) 2014-02-11
JP2011134927A (ja) 2011-07-07
US20110160889A1 (en) 2011-06-30

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