JP5361114B2 - 基板導通を利用した積重ねダイ式の構成をもつ集積回路 - Google Patents

基板導通を利用した積重ねダイ式の構成をもつ集積回路 Download PDF

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Publication number
JP5361114B2
JP5361114B2 JP2005358376A JP2005358376A JP5361114B2 JP 5361114 B2 JP5361114 B2 JP 5361114B2 JP 2005358376 A JP2005358376 A JP 2005358376A JP 2005358376 A JP2005358376 A JP 2005358376A JP 5361114 B2 JP5361114 B2 JP 5361114B2
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Japan
Prior art keywords
integrated circuit
substrate
die
power supply
stacked
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Expired - Fee Related
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JP2005358376A
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Japanese (ja)
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JP2006173615A5 (https=
JP2006173615A (ja
Inventor
ジョン ガバラ ザデウス
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Agere Systems LLC
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Agere Systems LLC
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/879—Bump connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/926—Multiple bond pads having different sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/20—Configurations of stacked chips
    • H10W90/24—Configurations of stacked chips at least one of the stacked chips being laterally offset from a neighbouring stacked chip, e.g. chip stacks having a staircase shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP2005358376A 2004-12-13 2005-12-13 基板導通を利用した積重ねダイ式の構成をもつ集積回路 Expired - Fee Related JP5361114B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/010,721 US7400047B2 (en) 2004-12-13 2004-12-13 Integrated circuit with stacked-die configuration utilizing substrate conduction
US11/010,721 2004-12-13

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012207994A Division JP2013033981A (ja) 2004-12-13 2012-09-21 基板導通を利用した積重ねダイ式の構成をもつ集積回路

Publications (3)

Publication Number Publication Date
JP2006173615A JP2006173615A (ja) 2006-06-29
JP2006173615A5 JP2006173615A5 (https=) 2008-10-02
JP5361114B2 true JP5361114B2 (ja) 2013-12-04

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JP2005358376A Expired - Fee Related JP5361114B2 (ja) 2004-12-13 2005-12-13 基板導通を利用した積重ねダイ式の構成をもつ集積回路
JP2012207994A Pending JP2013033981A (ja) 2004-12-13 2012-09-21 基板導通を利用した積重ねダイ式の構成をもつ集積回路

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JP2012207994A Pending JP2013033981A (ja) 2004-12-13 2012-09-21 基板導通を利用した積重ねダイ式の構成をもつ集積回路

Country Status (2)

Country Link
US (1) US7400047B2 (https=)
JP (2) JP5361114B2 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7623365B2 (en) 2007-08-29 2009-11-24 Micron Technology, Inc. Memory device interface methods, apparatus, and systems
US8106520B2 (en) 2008-09-11 2012-01-31 Micron Technology, Inc. Signal delivery in stacked device
US8063491B2 (en) * 2008-09-30 2011-11-22 Micron Technology, Inc. Stacked device conductive path connectivity
CN202758883U (zh) 2009-05-26 2013-02-27 拉姆伯斯公司 堆叠的半导体器件组件
KR102526614B1 (ko) * 2017-10-31 2023-04-27 엘지디스플레이 주식회사 게이트 드라이버와 이를 포함한 전계 발광 표시장치

Family Cites Families (24)

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Publication number Priority date Publication date Assignee Title
JPS5655067A (en) * 1979-10-11 1981-05-15 Matsushita Electric Ind Co Ltd Semiconductor integrated circuit device
DE3786314D1 (de) * 1986-09-23 1993-07-29 Siemens Ag Halbleiterbauelemente mit leistungs-mosfet und steuerschaltung.
US4947228A (en) * 1988-09-20 1990-08-07 At&T Bell Laboratories Integrated circuit power supply contact
JPH03120052U (https=) * 1990-03-23 1991-12-10
JPH0586216A (ja) * 1991-09-27 1993-04-06 Tonen Chem Corp 多孔性プラスチツクフイルムの製造方法
US5532512A (en) * 1994-10-03 1996-07-02 General Electric Company Direct stacked and flip chip power semiconductor device structures
US5731709A (en) * 1996-01-26 1998-03-24 Motorola, Inc. Method for testing a ball grid array semiconductor device and a device for such testing
US5973396A (en) * 1996-02-16 1999-10-26 Micron Technology, Inc. Surface mount IC using silicon vias in an area array format or same size as die array
DE19635582C1 (de) * 1996-09-02 1998-02-19 Siemens Ag Leistungs-Halbleiterbauelement für Brückenschaltungen mit High- bzw. Low-Side-Schaltern
JPH10223835A (ja) * 1997-02-05 1998-08-21 Hitachi Ltd 半導体装置とその製造方法
US6184585B1 (en) * 1997-11-13 2001-02-06 International Rectifier Corp. Co-packaged MOS-gated device and control integrated circuit
JP3563604B2 (ja) * 1998-07-29 2004-09-08 株式会社東芝 マルチチップ半導体装置及びメモリカード
US6122187A (en) * 1998-11-23 2000-09-19 Micron Technology, Inc. Stacked integrated circuits
KR20000057810A (ko) * 1999-01-28 2000-09-25 가나이 쓰토무 반도체 장치
US6586266B1 (en) * 1999-03-01 2003-07-01 Megic Corporation High performance sub-system design and assembly
JP3779524B2 (ja) * 2000-04-20 2006-05-31 株式会社東芝 マルチチップ半導体装置及びメモリカード
US6444576B1 (en) * 2000-06-16 2002-09-03 Chartered Semiconductor Manufacturing, Ltd. Three dimensional IC package module
US6594153B1 (en) * 2000-06-27 2003-07-15 Intel Corporation Circuit package for electronic systems
US20020074637A1 (en) * 2000-12-19 2002-06-20 Intel Corporation Stacked flip chip assemblies
US6635970B2 (en) * 2002-02-06 2003-10-21 International Business Machines Corporation Power distribution design method for stacked flip-chip packages
JP2005011986A (ja) * 2003-06-19 2005-01-13 Sanyo Electric Co Ltd 半導体装置
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US7129572B2 (en) * 2004-08-18 2006-10-31 Chung-Cheng Wang Submember mounted on a chip of electrical device for electrical connection

Also Published As

Publication number Publication date
JP2006173615A (ja) 2006-06-29
US20060125069A1 (en) 2006-06-15
JP2013033981A (ja) 2013-02-14
US7400047B2 (en) 2008-07-15

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