JP5361114B2 - 基板導通を利用した積重ねダイ式の構成をもつ集積回路 - Google Patents

基板導通を利用した積重ねダイ式の構成をもつ集積回路 Download PDF

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JP5361114B2
JP5361114B2 JP2005358376A JP2005358376A JP5361114B2 JP 5361114 B2 JP5361114 B2 JP 5361114B2 JP 2005358376 A JP2005358376 A JP 2005358376A JP 2005358376 A JP2005358376 A JP 2005358376A JP 5361114 B2 JP5361114 B2 JP 5361114B2
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integrated circuit
substrate
die
power supply
stacked
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JP2006173615A (ja
JP2006173615A5 (enExample
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ジョン ガバラ ザデウス
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Agere Systems LLC
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Agere Systems LLC
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    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2005358376A 2004-12-13 2005-12-13 基板導通を利用した積重ねダイ式の構成をもつ集積回路 Expired - Fee Related JP5361114B2 (ja)

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US11/010,721 US7400047B2 (en) 2004-12-13 2004-12-13 Integrated circuit with stacked-die configuration utilizing substrate conduction
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