JP5242114B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP5242114B2 JP5242114B2 JP2007260536A JP2007260536A JP5242114B2 JP 5242114 B2 JP5242114 B2 JP 5242114B2 JP 2007260536 A JP2007260536 A JP 2007260536A JP 2007260536 A JP2007260536 A JP 2007260536A JP 5242114 B2 JP5242114 B2 JP 5242114B2
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- nitride film
- memory cell
- oxide film
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- 239000004065 semiconductor Substances 0.000 title claims description 27
- 238000004519 manufacturing process Methods 0.000 title claims description 15
- 239000012535 impurity Substances 0.000 claims description 35
- 150000004767 nitrides Chemical class 0.000 claims description 23
- 239000000758 substrate Substances 0.000 claims description 23
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 22
- 229910052710 silicon Inorganic materials 0.000 claims description 22
- 239000010703 silicon Substances 0.000 claims description 22
- 238000002513 implantation Methods 0.000 claims description 16
- 238000000034 method Methods 0.000 claims description 11
- 238000005498 polishing Methods 0.000 claims description 5
- 230000015572 biosynthetic process Effects 0.000 claims description 4
- 238000005468 ion implantation Methods 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 description 24
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 24
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 18
- 229910052814 silicon oxide Inorganic materials 0.000 description 18
- 239000003963 antioxidant agent Substances 0.000 description 13
- 230000003078 antioxidant effect Effects 0.000 description 13
- 238000009792 diffusion process Methods 0.000 description 7
- 238000005520 cutting process Methods 0.000 description 6
- 238000002955 isolation Methods 0.000 description 6
- 238000001039 wet etching Methods 0.000 description 6
- 239000008188 pellet Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 230000003064 anti-oxidating effect Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000007943 implant Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
- H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
- H01L21/26586—Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
- H01L27/105—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B10/00—Static random access memory [SRAM] devices
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- High Energy & Nuclear Physics (AREA)
- Manufacturing & Machinery (AREA)
- Toxicology (AREA)
- Health & Medical Sciences (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
Description
2…ペレット対応領域
3…メモリセル領域外
4…メモリセル領域
10…シリコン基板
11…第1部分
12…第2部分
20…シリコン酸化膜
30…シリコン窒化膜
41、42…溝
50…埋め込み酸化膜
60…シリコン酸化膜
71、72…ゲート電極
81、82…拡散層
Claims (4)
- メモリセル領域外に対応する第1領域とメモリセル領域に対応する第2領域を含むシリコン基板上に窒化膜を形成するステップと、
前記窒化膜から前記シリコン基板に達する溝を形成するステップと、
前記溝の前記窒化膜における幅が広がるように前記窒化膜を後退させるステップと、
前記窒化膜を後退させるステップの後、前記溝を埋めるように埋め込み酸化膜を形成するステップと、
前記窒化膜をストッパーとして用いて前記埋め込み酸化膜を研磨するステップと、
前記埋め込み酸化膜を研磨するステップの後、前記窒化膜を除去するステップと、
前記窒化膜を除去するステップの後の第1不純物注入ステップと、
前記第1不純物注入ステップの後のゲート電極形成ステップと、
前記ゲート電極形成ステップの後の第2不純物注入ステップとを具備し、
前記溝は、前記第1領域に形成される隣り合う2つの第1溝と、前記第2領域に形成される隣り合う2つの第2溝とを含み、
前記窒化膜を後退させるステップにおいて、前記シリコン基板の前記2つの第1溝に挟まれた第1部分上の前記窒化膜を残し、前記シリコン基板の前記2つの第2溝に挟まれた第2部分上の前記窒化膜を除去し、
前記第1不純物注入ステップにおいて、前記メモリセル領域外に形成される第1トランジスタのしきい値電圧を調整するための不純物を、前記第2部分に注入することなく、前記第1部分に注入し、
前記ゲート電極形成ステップにおいて、前記第1部分上に第1ゲート電極を形成し、前記第2部分上に第2ゲート電極を形成する
半導体装置の製造方法。 - 前記第2不純物注入ステップにおいて、前記メモリセル領域に形成される第2トランジスタのしきい値電圧を調整するための不純物を前記第2部分に斜めイオン注入法により注入する
請求項1の半導体装置の製造方法。 - 前記第2トランジスタのチャネル幅及びチャネル長は、前記第1トランジスタのチャネル幅及びチャネル長より小さい
請求項1の半導体装置の製造方法。 - 前記第1不純物注入ステップにおいて、前記第2部分に不純物が注入されることが前記第2部分上の前記埋め込み酸化膜によって防がれ、
前記第2不純物注入ステップにおいて、前記第1部分に不純物を注入しない
請求項1乃至3のいずれかに記載の半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007260536A JP5242114B2 (ja) | 2007-10-04 | 2007-10-04 | 半導体装置の製造方法 |
US12/285,391 US7763516B2 (en) | 2007-10-04 | 2008-10-03 | Manufacturing method of semiconductor device having trench isolation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007260536A JP5242114B2 (ja) | 2007-10-04 | 2007-10-04 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009094114A JP2009094114A (ja) | 2009-04-30 |
JP5242114B2 true JP5242114B2 (ja) | 2013-07-24 |
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Application Number | Title | Priority Date | Filing Date |
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JP2007260536A Expired - Fee Related JP5242114B2 (ja) | 2007-10-04 | 2007-10-04 | 半導体装置の製造方法 |
Country Status (2)
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US (1) | US7763516B2 (ja) |
JP (1) | JP5242114B2 (ja) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR102502885B1 (ko) | 2015-10-06 | 2023-02-23 | 삼성전자주식회사 | 반도체 장치 및 그 제조 방법 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4270633B2 (ja) * | 1999-03-15 | 2009-06-03 | 株式会社東芝 | 半導体装置及び不揮発性半導体記憶装置の製造方法 |
JP2000323563A (ja) | 1999-05-14 | 2000-11-24 | Nec Corp | 半導体装置の製造方法 |
US6509216B2 (en) * | 2001-03-07 | 2003-01-21 | United Microelectronics Corp. | Memory structure with thin film transistor and method for fabricating the same |
JP3653485B2 (ja) | 2001-08-31 | 2005-05-25 | 株式会社半導体理工学研究センター | ポケット注入mosfetのしきい値電圧の計算方法 |
JP2004039734A (ja) * | 2002-07-01 | 2004-02-05 | Fujitsu Ltd | 素子分離膜の形成方法 |
JP2004356220A (ja) * | 2003-05-27 | 2004-12-16 | Elpida Memory Inc | 半導体装置および製造方法 |
US6995095B2 (en) * | 2003-10-10 | 2006-02-07 | Macronix International Co., Ltd. | Methods of simultaneously fabricating isolation structures having varying dimensions |
JP4886219B2 (ja) * | 2005-06-02 | 2012-02-29 | 株式会社東芝 | 半導体装置およびその製造方法 |
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2007
- 2007-10-04 JP JP2007260536A patent/JP5242114B2/ja not_active Expired - Fee Related
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2008
- 2008-10-03 US US12/285,391 patent/US7763516B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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JP2009094114A (ja) | 2009-04-30 |
US20090093098A1 (en) | 2009-04-09 |
US7763516B2 (en) | 2010-07-27 |
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