JP5203045B2 - 多層配線基板の中間製品、多層配線基板の製造方法 - Google Patents
多層配線基板の中間製品、多層配線基板の製造方法 Download PDFInfo
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- JP5203045B2 JP5203045B2 JP2008138885A JP2008138885A JP5203045B2 JP 5203045 B2 JP5203045 B2 JP 5203045B2 JP 2008138885 A JP2008138885 A JP 2008138885A JP 2008138885 A JP2008138885 A JP 2008138885A JP 5203045 B2 JP5203045 B2 JP 5203045B2
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0052—Depaneling, i.e. dividing a panel into circuit boards; Working of the edges of circuit boards
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
- H10W70/687—Shapes or dispositions thereof comprising multiple insulating layers characterized by the outer layers being for protection, e.g. solder masks, or for protection against chemical or mechanical damage
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09009—Substrate related
- H05K2201/0909—Preformed cutting or breaking line
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/0969—Apertured conductors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/016—Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/007—Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
- H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
- H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
- H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
- H10W70/65—Shapes or dispositions of interconnections
- H10W70/654—Top-view layouts
- H10W70/655—Fan-out layouts
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/0198—Manufacture or treatment batch processes
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/072—Connecting or disconnecting of bump connectors
- H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/944—Dispositions of multiple bond pads
- H10W72/9445—Top-view layouts, e.g. mirror arrays
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structure Of Printed Boards (AREA)
Description
27…製品部
28…製品形成領域
29…枠部
30…縁部
31…角部
41,42,43,44…樹脂絶縁層
51…製品部側導体層としての導体層
52…製品部側導体層としての端子パッド
53…製品部側導体層としてのBGA用パッド
54…枠部側導体層
61…切欠部としてのスリット
69…基材
73,74…金属箔としての銅箔
101…多層配線基板としてのコアレス配線基板
112…切欠部
120…外形線
121…切断予定線
130…はんだバンプ
131…部品としてのICチップ
146…ビアとしてのビア穴
147…ビアとしてのビア導体
Claims (10)
- 複数の樹脂絶縁層を積層した構造を有し、製品となるべき製品部が平面方向に沿って複数配置された製品形成領域と、その製品形成領域の周囲を取り囲む枠部とからなり、前記製品部内の領域における樹脂絶縁層上に製品部側導体層が形成され、前記枠部内の領域における樹脂絶縁層上に枠部側導体層が形成されている多層配線基板の中間製品であって、
前記枠部に、前記枠部を厚さ方向に貫通するとともに前記枠部の外周縁において開口する複数の切欠部を互いに等間隔に配置し、
前記複数の切欠部のうち少なくとも1つは、前記製品部の外形線に沿って設定された切断予定線の延長線上に配置され、深さが前記枠部の幅よりも小さく設定されている
ことを特徴とする多層配線基板の中間製品。 - 前記複数の切欠部のうち少なくとも1つは、隣接する前記製品部の外形線同士の間隔と同じ幅に設定されていることを特徴とする請求項1に記載の多層配線基板の中間製品。
- 前記枠部が、前記製品形成領域を取り囲むように配置される複数の縁部と、前記縁部同士の接続部分に位置する複数の角部とを有し、
前記複数の切欠部のうち前記角部に位置する切欠部は、前記角部を除去するように配置されている
ことを特徴とする請求項1または2に記載の多層配線基板の中間製品。 - 前記複数の切欠部は、前記製品部側導体層及び前記枠部側導体層を形成した後で形成されることを特徴とする請求項1乃至3のいずれか1項に記載の多層配線基板の中間製品。
- 最表層の前記樹脂絶縁層上に形成された前記製品部側導体層上に、部品接続用のはんだバンプが設けられていることを特徴とする請求項1乃至4のいずれか1項に記載の多層配線基板の中間製品。
- 前記多層配線基板は、前記樹脂絶縁層と前記製品部側導体層とを交互に積層した構造を有し、同一の前記樹脂絶縁層を主体として形成され、同一方向に拡径したビアのみによりそれぞれの前記製品部側導体層を接続する配線基板であることを特徴とする請求項1乃至5のいずれか1項に記載に多層配線基板の中間製品。
- 複数の樹脂絶縁層を積層した構造を有し、製品となるべき製品部が平面方向に沿って複数配置された製品形成領域と、その製品形成領域の周囲を取り囲む枠部とからなり、前記製品部内の領域における樹脂絶縁層上に製品部側導体層が形成され、前記枠部内の領域における樹脂絶縁層上に枠部側導体層が形成されている多層配線基板の中間製品を準備する準備工程と、
前記枠部に、前記枠部を厚さ方向に貫通するとともに前記枠部の外周縁において開口する複数の切欠部を形成する切欠部形成工程と
を含み、
前記複数の切欠部のうち少なくとも1つは、前記製品部の外形線に沿って設定された切断予定線の延長線上に配置され、深さが前記枠部の幅よりも小さく設定されている
ことを特徴とする多層配線基板の製造方法。 - 前記準備工程は、片面に金属箔を有する基材上に前記複数の樹脂絶縁層を積層する積層工程と、前記積層工程後、前記基材を除去して前記金属箔を露出させる基材除去工程と、前記基材除去工程後、前記金属箔に対するパターニングを行うことにより、最表層の前記樹脂絶縁層上における前記製品部内の領域に前記製品部側導体層を形成する製品部側導体層形成工程と、前記製品部側導体層形成工程後、最表層の前記樹脂絶縁層上に形成された前記製品部側導体層上に部品接続用のはんだバンプを形成するはんだバンプ形成工程とからなり、
前記切欠部形成工程は、前記製品部側導体層形成工程後に実行されることを特徴とする請求項7に記載の多層配線基板の製造方法。 - 前記切欠部形成工程は、前記はんだバンプ形成工程前に実行されることを特徴とする請求項8に記載の多層配線基板の製造方法。
- 前記多層配線基板は、前記樹脂絶縁層と前記製品部側導体層とを交互に積層した構造を有し、同一の前記樹脂絶縁層を主体として形成され、同一方向に拡径したビアのみによりそれぞれの前記製品部側導体層を接続する配線基板であることを特徴とする請求項7乃至9のいずれか1項に記載の多層配線基板の製造方法。
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008138885A JP5203045B2 (ja) | 2008-05-28 | 2008-05-28 | 多層配線基板の中間製品、多層配線基板の製造方法 |
| TW098117594A TWI412302B (zh) | 2008-05-28 | 2009-05-27 | 中間多層配線板製品及製造多層配線板之方法 |
| US12/473,609 US7977580B2 (en) | 2008-05-28 | 2009-05-28 | Intermediate multilayer wiring board product, and method for manufacturing multilayer wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008138885A JP5203045B2 (ja) | 2008-05-28 | 2008-05-28 | 多層配線基板の中間製品、多層配線基板の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2009289848A JP2009289848A (ja) | 2009-12-10 |
| JP5203045B2 true JP5203045B2 (ja) | 2013-06-05 |
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| JP2008138885A Expired - Fee Related JP5203045B2 (ja) | 2008-05-28 | 2008-05-28 | 多層配線基板の中間製品、多層配線基板の製造方法 |
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| JP (1) | JP5203045B2 (ja) |
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| JP5290017B2 (ja) * | 2008-03-28 | 2013-09-18 | 日本特殊陶業株式会社 | 多層配線基板及びその製造方法 |
| TWI390692B (zh) * | 2009-06-23 | 2013-03-21 | 欣興電子股份有限公司 | 封裝基板與其製法暨基材 |
| JP2012009586A (ja) * | 2010-06-24 | 2012-01-12 | Shinko Electric Ind Co Ltd | 配線基板、半導体装置及び配線基板の製造方法 |
| US8698303B2 (en) | 2010-11-23 | 2014-04-15 | Ibiden Co., Ltd. | Substrate for mounting semiconductor, semiconductor device and method for manufacturing semiconductor device |
| JP2012169591A (ja) | 2011-01-24 | 2012-09-06 | Ngk Spark Plug Co Ltd | 多層配線基板 |
| JP5530955B2 (ja) | 2011-02-21 | 2014-06-25 | 日本特殊陶業株式会社 | 多層配線基板 |
| JP2013030603A (ja) * | 2011-07-28 | 2013-02-07 | Hitachi Chem Co Ltd | 配線基板の製造方法 |
| JP2013098410A (ja) * | 2011-11-02 | 2013-05-20 | Ibiden Co Ltd | 多数個取り基板 |
| JP2013149941A (ja) * | 2011-12-22 | 2013-08-01 | Ngk Spark Plug Co Ltd | 多層配線基板及びその製造方法 |
| JP2013135080A (ja) | 2011-12-26 | 2013-07-08 | Ngk Spark Plug Co Ltd | 多層配線基板の製造方法 |
| JP2013153045A (ja) * | 2012-01-25 | 2013-08-08 | Kyocer Slc Technologies Corp | 集合基板の製造方法 |
| JP2014063892A (ja) * | 2012-09-21 | 2014-04-10 | Kyocera Corp | 多数個取り配線基板 |
| JP6036837B2 (ja) * | 2012-09-26 | 2016-11-30 | 日立化成株式会社 | 多層配線板、及び、多層配線板の製造方法 |
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| TWM517410U (zh) * | 2014-02-13 | 2016-02-11 | 群成科技股份有限公司 | 電子封裝件與封裝載板 |
| CN105789161B (zh) * | 2014-12-22 | 2019-07-12 | 恒劲科技股份有限公司 | 封装结构及其制法 |
| US9648728B1 (en) * | 2015-01-21 | 2017-05-09 | Altera Corporation | Coreless organic substrate |
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| JP2016143727A (ja) * | 2015-01-30 | 2016-08-08 | イビデン株式会社 | プリント配線板およびその製造方法 |
| JP2017045820A (ja) * | 2015-08-26 | 2017-03-02 | 京セラ株式会社 | 集合基板 |
| WO2017217126A1 (ja) * | 2016-06-17 | 2017-12-21 | 株式会社村田製作所 | 樹脂多層基板の製造方法 |
| CN107591381B (zh) * | 2016-07-06 | 2019-09-17 | 欣兴电子股份有限公司 | 线路重分布结构的制造方法与线路重分布结构单元 |
| JP6835642B2 (ja) * | 2017-01-17 | 2021-02-24 | 京セラ株式会社 | 集合基板およびその製造方法 |
| JP6815880B2 (ja) * | 2017-01-25 | 2021-01-20 | 株式会社ディスコ | 半導体パッケージの製造方法 |
| WO2020217951A1 (ja) * | 2019-04-26 | 2020-10-29 | Tdk株式会社 | 集合基板及びその製造方法 |
| CN111988919B (zh) * | 2020-09-29 | 2022-05-17 | 华天科技(西安)有限公司 | 一种克服印制电路板翘曲的方法 |
| CN116635979A (zh) * | 2020-12-23 | 2023-08-22 | 三井金属矿业株式会社 | 布线基板和其裁切方法、以及多层布线板 |
| CN113784522B (zh) * | 2021-09-06 | 2024-12-27 | 联宝(合肥)电子科技有限公司 | 改善印制电路板弯翘的方法及防弯翘印制电路板 |
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| JP2876989B2 (ja) * | 1994-05-31 | 1999-03-31 | 松下電工株式会社 | プリント配線板の製造方法 |
| US6107179A (en) * | 1998-05-28 | 2000-08-22 | Xerox Corporation | Integrated flexible interconnection |
| KR100272166B1 (ko) * | 1998-06-30 | 2000-11-15 | 윤종용 | 소자분리영역에 형성된 더미 도전층을 갖춘반도체소자 및 그제조방법 |
| JP2000228566A (ja) * | 1999-02-04 | 2000-08-15 | Matsushita Electric Ind Co Ltd | 集合プリント配線板 |
| JP3619773B2 (ja) * | 2000-12-20 | 2005-02-16 | 株式会社ルネサステクノロジ | 半導体装置の製造方法 |
| US6734571B2 (en) * | 2001-01-23 | 2004-05-11 | Micron Technology, Inc. | Semiconductor assembly encapsulation mold |
| TW498443B (en) * | 2001-06-21 | 2002-08-11 | Advanced Semiconductor Eng | Singulation method for manufacturing multiple lead-free semiconductor packages |
| JP3664720B2 (ja) | 2001-10-31 | 2005-06-29 | 新光電気工業株式会社 | 半導体装置用多層回路基板の製造方法 |
| US20030168249A1 (en) * | 2002-02-14 | 2003-09-11 | Ngk Spark Plug Co., Ltd. | Wiring board and method for producing the same |
| US7153724B1 (en) * | 2003-08-08 | 2006-12-26 | Ns Electronics Bangkok (1993) Ltd. | Method of fabricating no-lead package for semiconductor die with half-etched leadframe |
| JP2005167141A (ja) * | 2003-12-05 | 2005-06-23 | Ibiden Co Ltd | プリント配線板の製造方法及び多層プリント配線板 |
| TWI335195B (en) * | 2003-12-16 | 2010-12-21 | Ngk Spark Plug Co | Multilayer wiring board |
| JP4170266B2 (ja) * | 2004-07-02 | 2008-10-22 | 日本特殊陶業株式会社 | 配線基板の製造方法 |
| JP4546415B2 (ja) * | 2005-09-01 | 2010-09-15 | 日本特殊陶業株式会社 | 配線基板、セラミックキャパシタ |
| JP4312758B2 (ja) | 2005-12-27 | 2009-08-12 | 日本特殊陶業株式会社 | 配線基板の製造方法、配線基板の中間製品 |
| JP2007335700A (ja) * | 2006-06-16 | 2007-12-27 | Fujitsu Ltd | 配線基板の製造方法 |
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| US20090294156A1 (en) | 2009-12-03 |
| US7977580B2 (en) | 2011-07-12 |
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