JP5193583B2 - フィン型トランジスタ - Google Patents
フィン型トランジスタ Download PDFInfo
- Publication number
- JP5193583B2 JP5193583B2 JP2007324408A JP2007324408A JP5193583B2 JP 5193583 B2 JP5193583 B2 JP 5193583B2 JP 2007324408 A JP2007324408 A JP 2007324408A JP 2007324408 A JP2007324408 A JP 2007324408A JP 5193583 B2 JP5193583 B2 JP 5193583B2
- Authority
- JP
- Japan
- Prior art keywords
- gate electrode
- fin
- insulating layer
- finfet
- type transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/791—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
- H10D30/794—Arrangements for exerting mechanical stress on the crystal lattice of the channel regions comprising conductive materials, e.g. silicided source, drain or gate electrodes
Landscapes
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007324408A JP5193583B2 (ja) | 2007-12-17 | 2007-12-17 | フィン型トランジスタ |
| US12/335,701 US7989856B2 (en) | 2007-12-17 | 2008-12-16 | Fin transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007324408A JP5193583B2 (ja) | 2007-12-17 | 2007-12-17 | フィン型トランジスタ |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2009147194A JP2009147194A (ja) | 2009-07-02 |
| JP2009147194A5 JP2009147194A5 (enExample) | 2010-04-30 |
| JP5193583B2 true JP5193583B2 (ja) | 2013-05-08 |
Family
ID=40752058
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007324408A Active JP5193583B2 (ja) | 2007-12-17 | 2007-12-17 | フィン型トランジスタ |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US7989856B2 (enExample) |
| JP (1) | JP5193583B2 (enExample) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8519481B2 (en) | 2009-10-14 | 2013-08-27 | Taiwan Semiconductor Manufacturing Company, Ltd. | Voids in STI regions for forming bulk FinFETs |
| US9112052B2 (en) | 2009-10-14 | 2015-08-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Voids in STI regions for forming bulk FinFETs |
| JP5452211B2 (ja) * | 2009-12-21 | 2014-03-26 | ルネサスエレクトロニクス株式会社 | 半導体装置、および、半導体装置の製造方法 |
| JP2011258776A (ja) | 2010-06-09 | 2011-12-22 | Toshiba Corp | 不揮発性半導体メモリ |
| CN102315269B (zh) | 2010-07-01 | 2013-12-25 | 中国科学院微电子研究所 | 一种半导体器件及其形成方法 |
| JP5569243B2 (ja) * | 2010-08-09 | 2014-08-13 | ソニー株式会社 | 半導体装置及びその製造方法 |
| JP5713837B2 (ja) | 2011-08-10 | 2015-05-07 | 株式会社東芝 | 半導体装置の製造方法 |
| US8643120B2 (en) * | 2012-01-06 | 2014-02-04 | International Business Machines Corporation | FinFET with fully silicided gate |
| US8759184B2 (en) * | 2012-01-09 | 2014-06-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFETs and the methods for forming the same |
| US20130200455A1 (en) * | 2012-02-08 | 2013-08-08 | Taiwan Semiconductor Manufacturing Company, Ltd. | Dislocation smt for finfet device |
| JP5580355B2 (ja) | 2012-03-12 | 2014-08-27 | 株式会社東芝 | 半導体装置 |
| US8872284B2 (en) * | 2012-03-20 | 2014-10-28 | Taiwan Semiconductor Manufacturing Company, Ltd. | FinFET with metal gate stressor |
| US8921218B2 (en) * | 2012-05-18 | 2014-12-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal gate finFET device and method of fabricating thereof |
| US9397217B2 (en) | 2012-12-28 | 2016-07-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Contact structure of non-planar semiconductor device |
| US9034716B2 (en) * | 2013-01-31 | 2015-05-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of making a FinFET device |
| US8828818B1 (en) | 2013-03-13 | 2014-09-09 | Samsung Electronics Co., Ltd. | Methods of fabricating integrated circuit device with fin transistors having different threshold voltages |
| US8796666B1 (en) * | 2013-04-26 | 2014-08-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | MOS devices with strain buffer layer and methods of forming the same |
| KR102044468B1 (ko) * | 2013-05-13 | 2019-11-15 | 에스케이하이닉스 주식회사 | 반도체 소자 및 그 형성 방법 |
| US9246005B2 (en) | 2014-02-12 | 2016-01-26 | International Business Machines Corporation | Stressed channel bulk fin field effect transistor |
| US9590105B2 (en) * | 2014-04-07 | 2017-03-07 | National Chiao-Tung University | Semiconductor device with metal alloy over fin, conductive layer over channel region of fin, and semiconductive layer over conductive layer and formation thereof |
| US20160035891A1 (en) * | 2014-07-31 | 2016-02-04 | Qualcomm Incorporated | Stress in n-channel field effect transistors |
| US10243078B2 (en) | 2014-12-17 | 2019-03-26 | Intel Corporation | Carrier confinement for high mobility channel devices |
| US9537007B2 (en) | 2015-04-07 | 2017-01-03 | Qualcomm Incorporated | FinFET with cut gate stressor |
| US9577036B1 (en) * | 2015-11-12 | 2017-02-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | FinFET isolation structure and method for fabricating the same |
| US10043888B2 (en) * | 2016-12-27 | 2018-08-07 | United Microelectronics Corp. | Method for forming a semiconductor structure |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6762448B1 (en) * | 2003-04-03 | 2004-07-13 | Advanced Micro Devices, Inc. | FinFET device with multiple fin structures |
| JP4290038B2 (ja) * | 2004-03-03 | 2009-07-01 | キヤノン株式会社 | 半導体装置及びトランジスタ並びに半導体装置の製造方法 |
| US7224033B2 (en) * | 2005-02-15 | 2007-05-29 | International Business Machines Corporation | Structure and method for manufacturing strained FINFET |
| JP2006351975A (ja) * | 2005-06-20 | 2006-12-28 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7655511B2 (en) * | 2005-11-03 | 2010-02-02 | International Business Machines Corporation | Gate electrode stress control for finFET performance enhancement |
| KR100763330B1 (ko) * | 2005-12-14 | 2007-10-04 | 삼성전자주식회사 | 활성 핀들을 정의하는 소자분리 방법, 이를 이용하는반도체소자의 제조방법 및 이에 의해 제조된 반도체소자 |
| JP2007207837A (ja) * | 2006-01-31 | 2007-08-16 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
| JP2007258485A (ja) * | 2006-03-23 | 2007-10-04 | Toshiba Corp | 半導体装置及びその製造方法 |
| JP4960007B2 (ja) * | 2006-04-26 | 2012-06-27 | 株式会社東芝 | 半導体装置及び半導体装置の製造方法 |
-
2007
- 2007-12-17 JP JP2007324408A patent/JP5193583B2/ja active Active
-
2008
- 2008-12-16 US US12/335,701 patent/US7989856B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| US7989856B2 (en) | 2011-08-02 |
| US20090152623A1 (en) | 2009-06-18 |
| JP2009147194A (ja) | 2009-07-02 |
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