JP5184132B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP5184132B2
JP5184132B2 JP2008034089A JP2008034089A JP5184132B2 JP 5184132 B2 JP5184132 B2 JP 5184132B2 JP 2008034089 A JP2008034089 A JP 2008034089A JP 2008034089 A JP2008034089 A JP 2008034089A JP 5184132 B2 JP5184132 B2 JP 5184132B2
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Japan
Prior art keywords
chip
pad electrode
main surface
spacer
pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008034089A
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English (en)
Japanese (ja)
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JP2009194189A (ja
JP2009194189A5 (https=
Inventor
誠 荒木
強 宮崎
修康 武藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Electronics Corp
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Renesas Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Electronics Corp filed Critical Renesas Electronics Corp
Priority to JP2008034089A priority Critical patent/JP5184132B2/ja
Publication of JP2009194189A publication Critical patent/JP2009194189A/ja
Publication of JP2009194189A5 publication Critical patent/JP2009194189A5/ja
Application granted granted Critical
Publication of JP5184132B2 publication Critical patent/JP5184132B2/ja
Expired - Fee Related legal-status Critical Current
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
JP2008034089A 2008-02-15 2008-02-15 半導体装置およびその製造方法 Expired - Fee Related JP5184132B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008034089A JP5184132B2 (ja) 2008-02-15 2008-02-15 半導体装置およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008034089A JP5184132B2 (ja) 2008-02-15 2008-02-15 半導体装置およびその製造方法

Publications (3)

Publication Number Publication Date
JP2009194189A JP2009194189A (ja) 2009-08-27
JP2009194189A5 JP2009194189A5 (https=) 2011-02-10
JP5184132B2 true JP5184132B2 (ja) 2013-04-17

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ID=41075942

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008034089A Expired - Fee Related JP5184132B2 (ja) 2008-02-15 2008-02-15 半導体装置およびその製造方法

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Country Link
JP (1) JP5184132B2 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10784244B2 (en) 2018-02-20 2020-09-22 Samsung Electronics Co., Ltd. Semiconductor package including multiple semiconductor chips and method of manufacturing the semiconductor package

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5673423B2 (ja) 2011-08-03 2015-02-18 富士通セミコンダクター株式会社 半導体装置および半導体装置の製造方法
JP2013093483A (ja) * 2011-10-27 2013-05-16 Semiconductor Components Industries Llc 半導体装置及びその製造方法
JP2016048756A (ja) 2014-08-28 2016-04-07 マイクロン テクノロジー， インク． 半導体装置
US10643919B2 (en) 2017-11-08 2020-05-05 Samsung Electronics Co., Ltd. Fan-out semiconductor package
KR102185706B1 (ko) * 2017-11-08 2020-12-02 삼성전자주식회사 팬-아웃 반도체 패키지
CN110444528B (zh) * 2018-05-04 2021-04-20 晟碟信息科技（上海）有限公司 包含虚设下拉式引线键合体的半导体装置
CN116314114B (zh) * 2023-05-24 2023-08-04 遂宁合芯半导体有限公司 一种半导体封装结构

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20030018204A (ko) * 2001-08-27 2003-03-06 삼성전자주식회사 스페이서를 갖는 멀티 칩 패키지
JP2005197491A (ja) * 2004-01-08 2005-07-21 Matsushita Electric Ind Co Ltd 半導体装置
JP4494240B2 (ja) * 2005-02-03 2010-06-30 富士通マイクロエレクトロニクス株式会社 樹脂封止型半導体装置
JP5205867B2 (ja) * 2007-08-27 2013-06-05 富士通セミコンダクター株式会社 半導体装置及びその製造方法
JP5529371B2 (ja) * 2007-10-16 2014-06-25 ピーエスフォー ルクスコ エスエイアールエル 半導体装置及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10784244B2 (en) 2018-02-20 2020-09-22 Samsung Electronics Co., Ltd. Semiconductor package including multiple semiconductor chips and method of manufacturing the semiconductor package

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JP2009194189A (ja) 2009-08-27

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