JP5159024B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP5159024B2
JP5159024B2 JP2005021919A JP2005021919A JP5159024B2 JP 5159024 B2 JP5159024 B2 JP 5159024B2 JP 2005021919 A JP2005021919 A JP 2005021919A JP 2005021919 A JP2005021919 A JP 2005021919A JP 5159024 B2 JP5159024 B2 JP 5159024B2
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JP
Japan
Prior art keywords
signal
input
transistor
element group
gate electrode
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Expired - Fee Related
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JP2005021919A
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English (en)
Japanese (ja)
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JP2005244212A5 (https=
JP2005244212A (ja
Inventor
潤 小山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2005021919A priority Critical patent/JP5159024B2/ja
Publication of JP2005244212A publication Critical patent/JP2005244212A/ja
Publication of JP2005244212A5 publication Critical patent/JP2005244212A5/ja
Application granted granted Critical
Publication of JP5159024B2 publication Critical patent/JP5159024B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

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  • Semiconductor Integrated Circuits (AREA)
JP2005021919A 2004-01-30 2005-01-28 半導体装置 Expired - Fee Related JP5159024B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005021919A JP5159024B2 (ja) 2004-01-30 2005-01-28 半導体装置

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2004024248 2004-01-30
JP2004024248 2004-01-30
JP2005021919A JP5159024B2 (ja) 2004-01-30 2005-01-28 半導体装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012067077A Division JP5552500B2 (ja) 2004-01-30 2012-03-23 半導体装置

Publications (3)

Publication Number Publication Date
JP2005244212A JP2005244212A (ja) 2005-09-08
JP2005244212A5 JP2005244212A5 (https=) 2008-01-17
JP5159024B2 true JP5159024B2 (ja) 2013-03-06

Family

ID=35025569

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005021919A Expired - Fee Related JP5159024B2 (ja) 2004-01-30 2005-01-28 半導体装置

Country Status (1)

Country Link
JP (1) JP5159024B2 (https=)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007109216A (ja) * 2005-09-13 2007-04-26 Semiconductor Energy Lab Co Ltd 半導体装置
JP5084134B2 (ja) * 2005-11-21 2012-11-28 日本電気株式会社 表示装置及びこれらを用いた機器
US8463332B2 (en) * 2006-08-31 2013-06-11 Semiconductor Energy Laboratory Co., Ltd. Wireless communication device
FR2985059B1 (fr) * 2011-12-21 2014-01-10 Oberthur Technologies Dispositif de securisation d'un document electronique
JP6147713B2 (ja) * 2014-09-26 2017-06-14 日本電信電話株式会社 Ｒｆｉｄタグ、その出荷前管理システム、出荷前管理方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2939086B2 (ja) * 1992-03-30 1999-08-25 三菱電機株式会社 半導体装置
JP3557275B2 (ja) * 1995-03-29 2004-08-25 株式会社ルネサステクノロジ 半導体集積回路装置及びマイクロコンピュータ
US6000036A (en) * 1996-07-17 1999-12-07 International Business Machines Corp. Logical steering to avoid hot spots on integrated circuits
JPH1131784A (ja) * 1997-07-10 1999-02-02 Rohm Co Ltd 非接触ｉｃカード
WO1999010796A1 (fr) * 1997-08-27 1999-03-04 Hitachi, Ltd. Circuit integre a semi-conducteurs et systeme de traitement de donnees
JP3573957B2 (ja) * 1998-05-20 2004-10-06 インターナショナル・ビジネス・マシーンズ・コーポレーション コンピュータ内のプロセッサの動作速度制御方法及びコンピュータ
JP2001051292A (ja) * 1998-06-12 2001-02-23 Semiconductor Energy Lab Co Ltd 半導体装置および半導体表示装置
JP3376960B2 (ja) * 1999-06-01 2003-02-17 日本電気株式会社 半導体記憶装置およびそれを用いたシステム
JP2001298090A (ja) * 2000-04-17 2001-10-26 Nec Corp 半導体装置
JP3377786B2 (ja) * 2000-06-21 2003-02-17 日立マクセル株式会社 半導体チップ
JP3475237B2 (ja) * 2000-07-24 2003-12-08 東京大学長 電力制御装置及び方法並びに電力制御プログラムを記録した記録媒体

Also Published As

Publication number Publication date
JP2005244212A (ja) 2005-09-08

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