JP5147242B2 - 低ｋ相互配線構造物用のしなやかな不動態化エッジシール - Google Patents

低ｋ相互配線構造物用のしなやかな不動態化エッジシール Download PDF

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Publication number
JP5147242B2
JP5147242B2 JP2006549381A JP2006549381A JP5147242B2 JP 5147242 B2 JP5147242 B2 JP 5147242B2 JP 2006549381 A JP2006549381 A JP 2006549381A JP 2006549381 A JP2006549381 A JP 2006549381A JP 5147242 B2 JP5147242 B2 JP 5147242B2
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dielectric material
integrated circuit
layer
semiconductor wafer
inorganic dielectric
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Expired - Fee Related
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JP2006549381A
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Japanese (ja)
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JP2007518276A5 (enExample
JP2007518276A (ja
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エデルシュタイン、ダニエル
ニコルソン、リー、エム
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International Business Machines Corp
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International Business Machines Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3135—Double encapsulation or coating and encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3178—Coating or filling in grooves made in the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H01L23/3185—Partial encapsulation or coating the coating covering also the sidewalls of the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00013—Fully indexed content
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H01L2924/143—Digital devices
    • H01L2924/1433—Application-specific integrated circuit [ASIC]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Dicing (AREA)
JP2006549381A 2004-01-06 2005-01-06 低ｋ相互配線構造物用のしなやかな不動態化エッジシール Expired - Fee Related JP5147242B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/707,713 2004-01-06
US10/707,713 US7098544B2 (en) 2004-01-06 2004-01-06 Edge seal for integrated circuit chips
PCT/US2005/000289 WO2005067598A2 (en) 2004-01-06 2005-01-06 Compliant passivated edge seal for low-k interconnect structures

Publications (3)

Publication Number Publication Date
JP2007518276A JP2007518276A (ja) 2007-07-05
JP2007518276A5 JP2007518276A5 (enExample) 2007-11-22
JP5147242B2 true JP5147242B2 (ja) 2013-02-20

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JP2006549381A Expired - Fee Related JP5147242B2 (ja) 2004-01-06 2005-01-06 低ｋ相互配線構造物用のしなやかな不動態化エッジシール

Country Status (7)

Country Link
US (2) US7098544B2 (enExample)
EP (1) EP1721334A4 (enExample)
JP (1) JP5147242B2 (enExample)
KR (1) KR100962906B1 (enExample)
CN (1) CN100552928C (enExample)
TW (1) TWI339901B (enExample)
WO (1) WO2005067598A2 (enExample)

Families Citing this family (48)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8084866B2 (en) 2003-12-10 2011-12-27 Micron Technology, Inc. Microelectronic devices and methods for filling vias in microelectronic devices
US7091124B2 (en) 2003-11-13 2006-08-15 Micron Technology, Inc. Methods for forming vias in microelectronic devices, and methods for packaging microelectronic devices
JP3811160B2 (ja) * 2004-03-09 2006-08-16 株式会社東芝 半導体装置
US20050247894A1 (en) 2004-05-05 2005-11-10 Watkins Charles M Systems and methods for forming apertures in microfeature workpieces
US7232754B2 (en) 2004-06-29 2007-06-19 Micron Technology, Inc. Microelectronic devices and methods for forming interconnects in microelectronic devices
US7425499B2 (en) 2004-08-24 2008-09-16 Micron Technology, Inc. Methods for forming interconnects in vias and microelectronic workpieces including such interconnects
SG120200A1 (en) 2004-08-27 2006-03-28 Micron Technology Inc Slanted vias for electrical circuits on circuit boards and other substrates
US7300857B2 (en) 2004-09-02 2007-11-27 Micron Technology, Inc. Through-wafer interconnects for photoimager and memory wafers
US7271482B2 (en) 2004-12-30 2007-09-18 Micron Technology, Inc. Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods
US7795134B2 (en) 2005-06-28 2010-09-14 Micron Technology, Inc. Conductive interconnect structures and formation methods using supercritical fluids
US7582969B2 (en) * 2005-08-26 2009-09-01 Innovative Micro Technology Hermetic interconnect structure and method of manufacture
US7863187B2 (en) 2005-09-01 2011-01-04 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
US7622377B2 (en) 2005-09-01 2009-11-24 Micron Technology, Inc. Microfeature workpiece substrates having through-substrate vias, and associated methods of formation
US7262134B2 (en) 2005-09-01 2007-08-28 Micron Technology, Inc. Microfeature workpieces and methods for forming interconnects in microfeature workpieces
US7531442B2 (en) * 2005-11-30 2009-05-12 Lsi Corporation Eliminate IMC cracking in post wirebonded dies: macro level stress reduction by modifying dielectric/metal film stack in be layers during Cu/Low-K processing
TWI334638B (en) * 2005-12-30 2010-12-11 Ind Tech Res Inst Structure and process of chip package
US7749899B2 (en) 2006-06-01 2010-07-06 Micron Technology, Inc. Microelectronic workpieces and methods and systems for forming interconnects in microelectronic workpieces
US7679195B2 (en) * 2006-06-20 2010-03-16 Taiwan Semiconductor Manufacturing Co., Ltd. PAD structure and method of testing
US7629249B2 (en) 2006-08-28 2009-12-08 Micron Technology, Inc. Microfeature workpieces having conductive interconnect structures formed by chemically reactive processes, and associated systems and methods
US7902643B2 (en) 2006-08-31 2011-03-08 Micron Technology, Inc. Microfeature workpieces having interconnects and conductive backplanes, and associated systems and methods
TWI322495B (en) * 2006-12-20 2010-03-21 Phoenix Prec Technology Corp Carrier structure embedded with a chip and method for manufacturing the same
US7535689B2 (en) * 2007-06-21 2009-05-19 Intel Corporation Reducing input capacitance of high speed integrated circuits
US7884457B2 (en) * 2007-06-26 2011-02-08 Stats Chippac Ltd. Integrated circuit package system with dual side connection
DE102007035902A1 (de) * 2007-07-31 2009-02-05 Siemens Ag Verfahren zum Herstellen eines elektronischen Bausteins und elektronischer Baustein
SG150410A1 (en) 2007-08-31 2009-03-30 Micron Technology Inc Partitioned through-layer via and associated systems and methods
US8680653B2 (en) * 2007-11-12 2014-03-25 Infineon Technologies Ag Wafer and a method of dicing a wafer
US7884015B2 (en) 2007-12-06 2011-02-08 Micron Technology, Inc. Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using such methods
US7566637B2 (en) 2007-12-13 2009-07-28 International Business Machines Corporation Method of inhibition of metal diffusion arising from laser dicing
US7439170B1 (en) 2008-03-07 2008-10-21 International Business Machines Corporation Design structure for final via designs for chip stress reduction
US7951647B2 (en) * 2008-06-17 2011-05-31 Taiwan Semiconductor Manufacturing Company, Ltd. Performing die-to-wafer stacking by filling gaps between dies
JP2010263145A (ja) * 2009-05-11 2010-11-18 Panasonic Corp 半導体装置及びその製造方法
US8859390B2 (en) * 2010-02-05 2014-10-14 International Business Machines Corporation Structure and method for making crack stop for 3D integrated circuits
US8497203B2 (en) 2010-08-13 2013-07-30 International Business Machines Corporation Semiconductor structures and methods of manufacture
US9748154B1 (en) * 2010-11-04 2017-08-29 Amkor Technology, Inc. Wafer level fan out semiconductor device and manufacturing method thereof
US8653623B2 (en) 2011-04-11 2014-02-18 Taiwan Semiconductor Manufacturing Company, Ltd. One-time programmable devices and methods of forming the same
US8962439B2 (en) 2011-04-11 2015-02-24 Taiwan Semiconductor Manufacturing Company, Ltd. Memory cell
US8829676B2 (en) * 2011-06-28 2014-09-09 Taiwan Semiconductor Manufacturing Company, Ltd. Interconnect structure for wafer level package
US20130075892A1 (en) * 2011-09-27 2013-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Method for Three Dimensional Integrated Circuit Fabrication
KR101906408B1 (ko) * 2011-10-04 2018-10-11 삼성전자주식회사 반도체 패키지 및 그 제조 방법
JP2014120657A (ja) * 2012-12-18 2014-06-30 Toshiba Corp 半導体装置
US9059333B1 (en) 2013-12-04 2015-06-16 International Business Machines Corporation Facilitating chip dicing for metal-metal bonding and hybrid wafer bonding
US9589912B1 (en) 2015-08-27 2017-03-07 Globalfoundries Inc. Integrated circuit structure with crack stop and method of forming same
US9589911B1 (en) 2015-08-27 2017-03-07 Globalfoundries Inc. Integrated circuit structure with metal crack stop and methods of forming same
US9553061B1 (en) * 2015-11-19 2017-01-24 Globalfoundries Inc. Wiring bond pad structures
WO2017154167A1 (ja) * 2016-03-10 2017-09-14 三井金属鉱業株式会社 多層積層板及びこれを用いた多層プリント配線板の製造方法
US20180005916A1 (en) * 2016-06-30 2018-01-04 Taiwan Semiconductor Manufacturing Company Ltd. Semiconductor structure and manufacturing method thereof
EP3580294A4 (en) * 2017-04-14 2020-11-11 Hewlett-Packard Development Company, L.P. SUBSTRATE (S) SURROUNDED BY ENERGY ABSORBING MATERIAL
US10892233B2 (en) 2018-10-31 2021-01-12 International Business Machines Corporation Mitigating moisture-driven degradation of features designed to prevent structural failure of semiconductor wafers

Family Cites Families (47)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1230421A (enExample) * 1967-09-15 1971-05-05
US3852876A (en) * 1973-01-02 1974-12-10 Gen Electric High voltage power transistor and method for making
US4017340A (en) * 1975-08-04 1977-04-12 General Electric Company Semiconductor element having a polymeric protective coating and glass coating overlay
US4331970A (en) * 1978-09-18 1982-05-25 General Electric Company Use of dispersed solids as fillers in polymeric materials to provide material for semiconductor junction passivation
JPS5972745A (ja) * 1982-10-19 1984-04-24 Matsushita Electric Ind Co Ltd 半導体装置
JPS5972742A (ja) 1982-10-20 1984-04-24 Hitachi Ltd マスタスライスｌｓｉのマスタ方法
JPS61187346A (ja) * 1985-02-15 1986-08-21 Hitachi Ltd 絶縁膜構造および半導体装置
US5476211A (en) * 1993-11-16 1995-12-19 Form Factor, Inc. Method of manufacturing electrical contacts, using a sacrificial member
US6191492B1 (en) * 1988-08-26 2001-02-20 Semiconductor Energy Laboratory Co., Ltd. Electronic device including a densified region
US5008213A (en) * 1988-12-09 1991-04-16 The United States Of America As Represented By The Secretary Of The Air Force Hybrid wafer scale microcircuit integration
US5679977A (en) * 1990-09-24 1997-10-21 Tessera, Inc. Semiconductor chip assemblies, methods of making same and components for same
US5148265A (en) * 1990-09-24 1992-09-15 Ist Associates, Inc. Semiconductor chip assemblies with fan-in leads
US5287003A (en) * 1991-02-26 1994-02-15 U.S. Philips Corporation Resin-encapsulated semiconductor device having a passivation reinforcement hard polyimide film
US5310965A (en) * 1991-08-28 1994-05-10 Nec Corporation Multi-level wiring structure having an organic interlayer insulating film
US5198963A (en) * 1991-11-21 1993-03-30 Motorola, Inc. Multiple integrated circuit module which simplifies handling and testing
JP2742747B2 (ja) * 1992-05-29 1998-04-22 株式会社半導体エネルギー研究所 薄膜トランジスタを有する多層半導体集積回路
JP2776457B2 (ja) * 1992-12-29 1998-07-16 インターナショナル・ビジネス・マシーンズ・コーポレイション 半導体デバイスのクラックストップ形成方法及び半導体デバイス
US5300461A (en) * 1993-01-25 1994-04-05 Intel Corporation Process for fabricating sealed semiconductor chip using silicon nitride passivation film
US5557148A (en) * 1993-03-30 1996-09-17 Tribotech Hermetically sealed semiconductor device
US5593927A (en) * 1993-10-14 1997-01-14 Micron Technology, Inc. Method for packaging semiconductor dice
US5674785A (en) * 1995-11-27 1997-10-07 Micron Technology, Inc. Method of producing a single piece package for semiconductor die
US5956605A (en) * 1996-09-20 1999-09-21 Micron Technology, Inc. Use of nitrides for flip-chip encapsulation
US5861658A (en) * 1996-10-03 1999-01-19 International Business Machines Corporation Inorganic seal for encapsulation of an organic layer and method for making the same
US5789302A (en) * 1997-03-24 1998-08-04 Siemens Aktiengesellschaft Crack stops
JP3753218B2 (ja) * 1998-03-23 2006-03-08 セイコーエプソン株式会社 半導体装置及びその製造方法、回路基板並びに電子機器
JP4424768B2 (ja) * 1998-11-10 2010-03-03 株式会社ルネサステクノロジ 半導体装置およびその製造方法
JP2000277465A (ja) * 1999-03-26 2000-10-06 Sanyo Electric Co Ltd 半導体装置の製造方法
US6521975B1 (en) * 1999-05-20 2003-02-18 Texas Instruments Incorporated Scribe street seals in semiconductor devices and method of fabrication
DE19939852B4 (de) * 1999-08-23 2006-01-12 Infineon Technologies Ag Stacked Via mit besonders ausgebildetem Landing Pad für integrierte Halbleiterstrukturen
US6882045B2 (en) * 1999-10-28 2005-04-19 Thomas J. Massingill Multi-chip module and method for forming and method for deplating defective capacitors
KR100314133B1 (ko) * 1999-11-26 2001-11-15 윤종용 가장자리에 흡습방지막이 형성된 반도체 칩 및 이흡습방지막의 형성방법
US6887804B2 (en) * 2000-01-10 2005-05-03 Electro Scientific Industries, Inc. Passivation processing over a memory link
US6368899B1 (en) * 2000-03-08 2002-04-09 Maxwell Electronic Components Group, Inc. Electronic device packaging
JP3701542B2 (ja) * 2000-05-10 2005-09-28 シャープ株式会社 半導体装置およびその製造方法
JP2002050688A (ja) * 2000-08-03 2002-02-15 Seiko Epson Corp 半導体装置およびその製造方法
US6709898B1 (en) * 2000-10-04 2004-03-23 Intel Corporation Die-in-heat spreader microelectronic package
US6555906B2 (en) * 2000-12-15 2003-04-29 Intel Corporation Microelectronic package having a bumpless laminated interconnection layer
US6383893B1 (en) * 2000-12-28 2002-05-07 International Business Machines Corporation Method of forming a crack stop structure and diffusion barrier in integrated circuits
US20030022330A1 (en) 2001-04-19 2003-01-30 Myriad Genetics, Incorporated APOA2-interacting proteins and use thereof
US20020163062A1 (en) * 2001-02-26 2002-11-07 International Business Machines Corporation Multiple material stacks with a stress relief layer between a metal structure and a passivation layer
JP2002270721A (ja) * 2001-03-12 2002-09-20 Fujitsu Ltd 半導体装置及びその製造方法
JP2003188406A (ja) * 2001-12-20 2003-07-04 Sumitomo Electric Ind Ltd 受光素子、これを用いた光受信器および製造方法
US6650010B2 (en) * 2002-02-15 2003-11-18 International Business Machines Corporation Unique feature design enabling structural integrity for advanced low K semiconductor chips
US20040063237A1 (en) * 2002-09-27 2004-04-01 Chang-Han Yun Fabricating complex micro-electromechanical systems using a dummy handling substrate
US20040088855A1 (en) * 2002-11-11 2004-05-13 Salman Akram Interposers for chip-scale packages, chip-scale packages including the interposers, test apparatus for effecting wafer-level testing of the chip-scale packages, and methods
US20040102022A1 (en) * 2002-11-22 2004-05-27 Tongbi Jiang Methods of fabricating integrated circuitry
KR100528326B1 (ko) * 2002-12-31 2005-11-15 삼성전자주식회사 가요성 기판 상에 보호캡을 구비하는 박막 반도체 소자 및 이를 이용하는 전자장치 및 그 제조방법

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Publication number Publication date
US20060281224A1 (en) 2006-12-14
CN100552928C (zh) 2009-10-21
EP1721334A2 (en) 2006-11-15
KR20070000424A (ko) 2007-01-02
TW200534494A (en) 2005-10-16
CN1926681A (zh) 2007-03-07
WO2005067598A3 (en) 2006-11-23
KR100962906B1 (ko) 2010-06-09
US7273770B2 (en) 2007-09-25
US20050145994A1 (en) 2005-07-07
US7098544B2 (en) 2006-08-29
TWI339901B (en) 2011-04-01
JP2007518276A (ja) 2007-07-05
EP1721334A4 (en) 2010-04-07
WO2005067598A2 (en) 2005-07-28

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