JP5112005B2 - Wiring board with built-in plate-shaped component and manufacturing method thereof - Google Patents

Description

  The present invention relates to a wiring board with a built-in plate-like component in which a plate-like component is accommodated in a core substrate and a method for manufacturing the same.

  In recent years, semiconductor integrated circuit elements (IC chips) used as computer microprocessors and the like have become increasingly faster and more functional, with an accompanying increase in the number of terminals and a tendency to narrow the pitch between terminals. . In general, a large number of terminals are densely arranged on the bottom surface of an IC chip, and such a terminal group is connected to a terminal group on the motherboard side in the form of a flip chip. However, it is difficult to connect the IC chip directly on the mother board because there is a large difference in the pitch between the terminals on the IC chip side terminal group and the mother board side terminal group. For this reason, generally, a technique is adopted in which an IC chip is mounted on an IC chip mounting wiring board, and the IC chip mounting wiring board is mounted on a motherboard. In this type of IC chip mounting wiring board, it has been proposed to provide a capacitor (also referred to as a “capacitor”) in order to reduce switching noise of the IC chip and to stabilize the power supply voltage. As an example, a wiring substrate in which a ceramic capacitor is embedded in a core substrate made of a polymer material and buildup layers are formed on the front surface and the back surface of the core substrate has been conventionally proposed (for example, see Patent Documents 1 and 2). .

  FIG. 12 shows a conventional IC chip mounting wiring board 200. The IC chip mounting wiring substrate 200 includes a flat core substrate 201 made of glass epoxy, a buildup layer 202 formed on the upper surface of the core substrate 201, and a build formed on the lower surface of the core substrate 201. And an up layer 203. The core substrate 201 has an accommodation hole portion 205 that opens at the upper surface and the lower surface, and the ceramic chip 206 is accommodated in the accommodation hole portion 205. In this IC chip mounting wiring board 200, the ceramic chip 206 is fixed by filling a gap between the inner surface of the accommodation hole 205 and the side surface of the ceramic chip 206 with a resin filler 207. When the IC chip 208 is mounted on the wiring board 200, a stress is generated between the ceramic chip 206 and the receiving hole 205 due to a temperature change after soldering. By interposing the resin filler 207 between the two, the stress is absorbed.

By the way, the accommodation hole 205 is a through-hole penetrating in the thickness direction of the wiring board 200 and is provided so that the distance between the ceramic chip 206 and the accommodation hole 205 has the same width on the upper surface side and the lower surface side. Yes.
JP 2006-253668 A JP 2000-261124 A

  However, in the wiring board 200, if the accommodation hole 205 is enlarged to widen the gap with the ceramic chip 206, the space for providing the wiring pattern is reduced. For this reason, the gap between the accommodation hole 205 and the ceramic chip 206 is desired to be as narrow as possible. However, if the gap is narrowed, it becomes difficult to fill the resin filler 207, and the resin filler 207 can be reliably filled to the lower part of the gap. become unable. In this case, the absorption of stress acting between the ceramic chip 206 and the accommodation hole 205 becomes insufficient, and the reliability of the wiring board 200 is lowered. Further, when the gap is widened, voids are likely to be generated in the resin filler 207 due to insufficient filling amount of the resin filler 207, which also causes a decrease in reliability.

  Incidentally, in the wiring board of Patent Document 2, a step is provided in the accommodation hole for accommodating the capacitor, and the opening area on the side filled with the resin filler is large. However, this step functions as a capacitor receiving portion formed to abut against the capacitor and position the capacitor in the vertical direction, and is not a configuration for facilitating filling with the resin filler. That is, since the capacitor is in direct contact with the step portion in the accommodation hole portion without interposing the filler, the stress generated in this portion cannot be sufficiently absorbed.

  The present invention has been made in view of the above-mentioned problems, and its purpose is to incorporate a plate-like component with excellent reliability by appropriately interposing a resin filler in the gap between the receiving hole and the plate-like component. It is to provide a wiring board. Another object of the present invention is to provide a method of manufacturing a wiring board with a built-in plate component that can reliably fill a resin filler into the gap between the housing hole and the plate-like component in the wiring board with a built-in plate-like component. is there.

And as means (means 1) for solving the above-mentioned problems, there are a core substrate having a core main surface and a core back surface, and having an accommodation hole opening at the core main surface and the core back surface, and a component first The component has a main surface and a component second main surface, and is accommodated in the accommodating hole portion with the component first main surface facing the core main surface side and the component second main surface facing the core back surface side. A plate-shaped component, a core main surface side interlayer insulating layer, and a core main surface side conductor layer are stacked and disposed on the core main surface and the component first main surface, A structure in which a first buildup layer in which a plurality of first terminal portions to which a semiconductor integrated circuit element can be flip-chip connected is formed, a core back-side interlayer insulating layer, and a core back-side conductor layer are stacked, Arranged on the back surface of the core and the second main surface of the component, the surface layer is in contact with another substrate. The plate-like component is fixed to the core substrate by filling a gap between the second buildup layer formed with a plurality of second terminal portions that can be formed, and the inner surface of the receiving hole and the side surface of the plate-like component. A cross-sectional shape of the accommodation hole that appears when the core substrate is cut along its thickness direction, and gradually widens from the core main surface side to the core back surface side. is optionally Rutotomoni, the resin filler to fill the gap between the inner surface and the plate-like part of the side surface of the accommodation hole is, the are thicker toward the core back surface side, the resin filler, the core main There is a wiring board with a built-in plate-like component, which is connected to the core main surface side interlayer insulating layer constituting the first buildup layer on the surface side .

Therefore, according to the plate-like component built-in wiring board of means 1, since the cross-sectional shape of the accommodation hole portion gradually increases from the core main surface side to the core back surface side, the cross-sectional shape is wide from the core back surface side. By supplying the resin filler to the gap between the portion and the plate-like component, the resin filler can be reliably filled without generating a void in the gap between the inner surface of the accommodation hole and the side surface of the plate-like component. As a result, the stress acting between the housing hole and the plate-like component in the core substrate can be reliably absorbed by the resin filler, and the occurrence of cracks and the like can be prevented. Further, since the surface area on the core main surface side of the core substrate is increased, a sufficient space for providing a wiring pattern on the core main surface side can be secured. Further, when the semiconductor integrated circuit device is flip-chip connected to the wiring board, the second buildup layer located on the back side of the core contracts during cooling after solder bonding, but the first buildup located on the main surface side of the core shrinks. The layer hardly shrinks due to the presence of the semiconductor integrated circuit element. Therefore, the core substrate tends to warp to the core back side, and if the plate-like component cannot follow the warp, the stress is concentrated toward the core back side. In that regard, in the present invention, the resin filler is interposed between the accommodation hole and the plate-shaped part is made thicker core rear side, it is possible to reliably absorb the stress concentration, the wiring substrate Can improve the reliability.

  The size of the gap is preferably 0.3 mm or more and 0.5 mm or less on the core main surface side, and preferably 0.8 mm or more and 1 mm or less on the core back surface side. In this case, since the gap on the core back side is almost equal to the interval in the conventional product, the resin filler can be easily filled from the core back side. Further, as the gap on the core main surface side, an appropriate gap of 0.3 mm or more is secured, so that it is avoided that the resin filler is clogged and does not enter. Furthermore, since the gap on the core main surface side is 0.5 mm or less and becomes narrower than the conventional product, the surface area on the core main surface side of the core substrate can be increased, and a wiring space can be secured.

  It is preferable that the inner surface of the accommodation hole that appears when the core substrate is cut along the thickness direction is curved in a concave shape. If the accommodation hole is formed in this way, the resin filler can be filled more smoothly.

  It is preferable that the step between the component first main surface and the core main surface is smaller than the step between the component second main surface and the core back surface. In this case, the first buildup layer can be accurately formed without a step, and the semiconductor integrated circuit element can be reliably flip-chip connected to the first terminal portion of the first buildup layer.

  It is preferable that the core back side interlayer insulating layer also serves as the resin filler. In this case, when the resin filler is formed, it is not necessary to prepare a material different from the core back side interlayer insulating layer, so that the manufacturing cost of the wiring board can be suppressed.

  A material for forming the core substrate is not particularly limited, but a preferable core substrate is formed mainly of an organic material. Specific examples of the organic material forming the core substrate include EP resin (epoxy resin), PI resin (polyimide resin), BT resin (bismaleimide / triazine resin), PPE resin (polyphenylene ether resin), and the like. In addition, composite materials of these resins and glass fibers (glass woven fabric or glass nonwoven fabric) or organic fibers such as polyamide fibers may be used.

  Examples of the plate-like parts include inorganic plate-like parts such as ceramic plate-like parts, metal plate-like parts, and glass plate-like parts. Examples of the ceramic material constituting the ceramic plate-like component include low-temperature fired materials such as alumina, glass ceramic, and crystallized glass, aluminum nitride, silicon carbide, and silicon nitride. Examples of the metal material constituting the metal plate-like component include iron, gold, silver, copper, copper alloy, iron nickel alloy, silicon, and gallium arsenide. Examples of the metal plate-like component include a semiconductor integrated circuit chip (IC chip) and a MEMS (Micro Electro Mechanical Systems) element manufactured by a semiconductor manufacturing process. Here, “semiconductor integrated circuit chip” refers to an element mainly used as a microprocessor of a computer.

  On the other hand, examples of suitable ceramic plate-like parts include a chip capacitor and a via array type ceramic capacitor having a plurality of via conductors in the capacitor. In the ceramic capacitor, it is preferable that a plurality of via conductors in the capacitor are arranged in an array as a whole. With such a structure, the inductance of the ceramic capacitor can be reduced, and high-speed power supply for noise absorption and power supply fluctuation smoothing can be performed. In addition, the entire ceramic capacitor can be easily reduced in size, and as a result, the entire wiring board can be easily reduced in size. Moreover, a high electrostatic capacity is easily achieved for a small amount, and a more stable power supply can be achieved.

  As the ceramic dielectric layer constituting the ceramic capacitor, a sintered body of high-temperature fired ceramic such as alumina, aluminum nitride, boron nitride, silicon carbide, silicon nitride is preferably used, and borosilicate glass or borosilicate A sintered body of low-temperature fired ceramic such as glass ceramic obtained by adding an inorganic ceramic filler such as alumina to lead glass is preferably used. In this case, it is also preferable to use a sintered body of a dielectric ceramic such as barium titanate, lead titanate, or strontium titanate depending on the application. When a dielectric ceramic sintered body is used, a ceramic capacitor having a large capacitance can be easily realized.

  The resin filler is for fixing the plate-like component, and can be appropriately selected in consideration of stress relaxation characteristics, insulation properties, heat resistance, and the like. Preferred examples of the resin material for forming the resin filler include thermosetting resins such as epoxy resin, phenol resin, urethane resin, silicone resin, polyimide resin, polycarbonate resin, acrylic resin, polyacetal resin, polypropylene resin, etc. And other thermoplastic resins. Moreover, as a forming material of this resin filler, you may use the material etc. which added the glass filler to the said thermosetting resin or a thermoplastic resin.

  The core main surface side interlayer insulating layer constituting the first buildup layer and the core back surface side interlayer insulating layer constituting the second buildup layer are appropriately determined in consideration of insulation, heat resistance, moisture resistance, etc. You can choose. Preferred examples of the polymer material for forming the core main surface side interlayer insulating layer and the core back surface side interlayer insulating layer include epoxy resins, phenol resins, urethane resins, silicone resins, polyimide resins and other thermosetting resins, polycarbonates Examples thereof include thermoplastic resins such as resins, acrylic resins, polyacetal resins, and polypropylene resins. In addition, composite materials of these resins and organic fibers such as glass fibers (glass woven fabrics and glass nonwoven fabrics) and polyamide fibers, or three-dimensional network fluorine-based resin base materials such as continuous porous PTFE, epoxy resins, etc. A resin-resin composite material impregnated with a thermosetting resin may be used.

Further, as another means (means 2) for solving the problems of the present invention, a core substrate having a core main surface and a core back surface, and having an accommodation hole opening at the core main surface and the core back surface. And a plate-like component having a component first main surface and a component second main surface, and being housed and fixed in the housing hole, wherein the core substrate is disposed in the thickness direction. Hole forming step in which a hole shape is formed in the core substrate so that a cross-sectional shape of the receiving hole portion that appears when cutting along the core gradually increases from the core main surface side to the core back surface side. And the opening on the core main surface side in the accommodation hole is sealed, the component first main surface is directed to the core main surface side, and the component second main surface is directed to the core back surface side. , A component housing step for housing and arranging the plate-shaped component in the housing hole, and In more thickened and has resin filler go to the core back surface side by supplying the resin filler from said core rear surface side of the opening in the Yoana portion, the inner surface and the plate-like part of the side surface of the accommodation hole A component fixing step of filling the gap and fixing the plate-shaped component to the core substrate, and forming a first buildup layer on the core main surface and the resin filler, and at that time, the resin filler And a first buildup layer forming step of connecting to the core main surface side interlayer insulating layer constituting the first buildup layer on the core main surface side. There is a way.

  Therefore, according to the manufacturing method of the plate-like component built-in wiring board of the means 2, the housing hole portion in which the cross-sectional shape gradually widens from the core main surface side to the core back surface side by performing the hole machining step is the core. Processed and formed on the substrate. In the component fixing step, by supplying the resin filler from the opening on the back side of the core having a wide cross-sectional shape, the resin filler can be added without generating a void in the gap between the inner surface of the accommodation hole and the side surface of the plate-like component. It can be filled reliably. As a result, the stress acting between the housing hole and the plate-like component in the core substrate can be reliably absorbed by the resin filler, and the occurrence of cracks and the like can be prevented. Further, since the surface area on the core main surface side of the core substrate is increased, a sufficient space for providing a wiring pattern on the core main surface side can be secured.

  Hereinafter, a method of manufacturing the capacitor built-in wiring board of means 2 will be described.

  In the hole processing step, the accommodation hole is formed by router processing. According to this router processing, it is possible to accurately form a receiving hole portion whose cross-sectional shape gradually increases from the core main surface side to the core back surface side.

  Moreover, in the said component accommodation process, after sealing the opening by the side of the said core main surface in the said accommodation hole part with an adhesive tape, the said plate-shaped component is accommodated and arrange | positioned in an accommodation hole part. In this case, since the position of the component first main surface and the core main surface can be aligned, the step between the component first main surface and the core main surface is set to the component second main surface and the core back surface. It can be made smaller than the step.

  The first buildup layer forming step is performed after the component housing step, and the core main surface side interlayer insulating layer and the core main surface side conductor layer are stacked and arranged. A first buildup layer is formed which is disposed on one main surface and on which a plurality of first terminal portions to which a semiconductor integrated circuit element can be flip-chip connected are formed. In this case, since the first buildup layer can be accurately formed without a step, the semiconductor integrated circuit element can be reliably flip-chip connected to the first terminal portion of the first buildup layer.

  In addition, a second buildup layer forming step is performed after the component housing step, and the core back surface side interlayer insulating layer and the core back surface side conductor layer are stacked and arranged. A second build-up layer is formed on the surface, on which a plurality of second terminal portions that can be connected to another substrate are formed. In the second buildup layer forming step, a part of the core main surface side interlayer insulating layer located at the lowermost layer is dropped into the gap to fill the gap, thereby fixing the plate-like component to the core substrate. It is preferable to do. In this way, when forming the resin filler, it is not necessary to prepare a material different from that for the core back side interlayer insulating layer, so that the manufacturing cost of the wiring board can be suppressed.

[First Embodiment]

  DESCRIPTION OF EMBODIMENTS A first embodiment embodying the present invention will be described below in detail with reference to the drawings.

  As shown in FIG. 1, a ceramic capacitor built-in wiring board 10 (plate-like component built-in wiring board) of the present embodiment is a wiring board for mounting an IC chip, and is a substantially rectangular plate-shaped core made of glass epoxy. It is formed on the substrate 11, the first buildup layer 31 formed on the core main surface 12 (upper surface in FIG. 1) of the core substrate 11, and the core back surface 13 (lower surface in FIG. 1) of the core substrate 11. And a second buildup layer 32. Through holes 15 penetrating in the thickness direction are formed at a plurality of locations in the core substrate 11, and an inner diameter of the through hole 15 is copper plated to give an outer diameter of 300 μm and a thickness of 20 μm. Through-hole conductors 16 are formed. The through-hole conductor 16 connects and connects the core main surface 12 side and the core back surface 13 side of the core substrate 11. Note that the inside of the through-hole conductor 16 is filled with a closing body 17 made of an insulating material (for example, an epoxy resin containing a silica filler). Further, a conductor layer 41 made of copper is patterned on the core main surface 12 and the core back surface 13 of the core substrate 11, and each conductor layer 41 is electrically connected to the through-hole conductor 16.

  The first buildup layer 31 formed on the core main surface 12 of the core substrate 11 includes two resin insulating layers 33 and 35 (core main surface side interlayer insulating layer) made of epoxy resin, and a conductor layer made of copper. 42 (core main surface side conductor layer) are laminated alternately. Terminal pads 44 (first terminal portions) are formed in an array at a plurality of locations on the surface of the resin insulating layer 35. The surface of the resin insulating layer 35 is almost entirely covered with a solder resist 37. An opening 46 for exposing the terminal pad 44 is formed at a predetermined position of the solder resist 37. The terminal pads 44 are flip-chip connected to the surface connection terminals 22 of the IC chip 21 via a plurality of solder bumps 45. The IC chip 21 is, for example, a semiconductor integrated circuit element having a function as an MPU, and is formed in a rectangular flat plate shape having a length of 14.0 mm × width of 14.0 mm × thickness of 0.7 mm.

  A region where each terminal pad 44 and each solder bump 45 is located is a component mounting region 23 in which the IC chip 21 can be mounted. The component mounting area 23 is set on the surface 39 of the buildup layer 31 and is a square area in plan view of 14.0 mm in length × 14.0 mm in width. That is, the component mounting area 23 is an area arranged immediately below the lower surface of the IC chip 21 and has the same outer shape and area as the lower surface of the IC chip 21 when viewed from the thickness direction. Further, via conductors 43 and 47 are provided in the resin insulation layers 33 and 35, respectively. These via conductors 43 and 47 electrically connect the conductor layer 42 and the terminal pad 44 to each other.

  The buildup layer 32 formed on the core back surface 13 of the core substrate 11 has substantially the same structure as the buildup layer 31 described above. That is, the buildup layer 32 has a structure in which two resin insulating layers 34 and 36 (core back side interlayer insulating layer) made of epoxy resin and conductor layers 50 (core back side conductor layers) are alternately laminated. is doing. BGA pads 48 (second terminal portions) that are electrically connected to the conductor layer 50 through via conductors 47 are formed in a plurality of locations on the lower surface of the resin insulating layer 36 in a lattice pattern. The lower surface of the resin insulating layer 36 is almost entirely covered with a solder resist 38. An opening 40 for exposing the BGA pad 48 is formed at a predetermined portion of the solder resist 38. On the surface of the BGA pad 48, a plurality of solder bumps 49 for electrical connection with the mother board 60 (another substrate) are disposed. The wiring board 10 is mounted on the mother board 60 by the solder bumps 49.

  The core substrate 11 has one accommodation hole 91 that is substantially rectangular in a plan view that opens at the center of the core main surface 12 and the center of the core back surface 13. That is, the accommodation hole 91 is a through hole. The accommodation hole portion 91 of the present embodiment is a tapered surface whose side surface is inclined so that the opening area increases toward the lower side. That is, the cross-sectional shape of the accommodation hole 91 that appears when the core substrate 11 is cut along the thickness direction gradually becomes wider from the core main surface 12 side to the core back surface 13 side. Specifically, the outer dimensions of the accommodation hole 91 are 10.6 mm long × 10.6 mm wide on the core main surface 12 side, and 12.0 mm × 12.0 mm wide on the core back surface 13 side.

  The ceramic capacitor 101 shown in FIGS. 2 and 3 is housed in the housing hole 91 in an embedded state. The ceramic capacitor 101 has a component first main surface 102 (upper surface in FIGS. 1 and 2) facing the same side as the core main surface 12 of the core substrate 11, and a component second main surface 103 (lower surface in FIGS. 1 and 2). ) Is directed to the same side as the core back surface 13 of the core substrate 11. The ceramic capacitor 101 of this embodiment has a rectangular flat plate shape of 10.0 mm long × 10.0 mm wide × 0.80 mm thick.

  Further, a gap between the inner surface of the accommodation hole 91 and the side surface of the ceramic capacitor 101 is filled with a resin filler 92 made of a polymer material (thermosetting resin in the present embodiment). The resin filler 92 has a function of fixing the ceramic capacitor 101 to the core substrate 11 and absorbing the deformation of the ceramic capacitor 101 and the core substrate 11 in the surface direction and the thickness direction by its own elastic deformation. The thickness of the resin filler 92 filled in the gap is about 0.3 mm on the core main surface 12 side of the core substrate 11 and about 1.0 mm on the core back surface 13 side of the core substrate 11.

  As shown in FIGS. 1 to 3, the ceramic capacitor 101 of this embodiment is a so-called via array type ceramic capacitor. A ceramic sintered body 104 constituting the ceramic capacitor 101 is a plate-like component having a component first main surface 102 (upper surface) and a component second main surface 103 (lower surface). The ceramic sintered body 104 has a structure in which the first internal electrode layers 141 and the second internal electrode layers 142 are alternately stacked via the ceramic dielectric layer 105. The ceramic dielectric layer 105 is made of a sintered body of barium titanate, which is a kind of high dielectric constant ceramic, and functions as a dielectric between the first internal electrode layer 141 and the second internal electrode layer 142. Each of the first internal electrode layer 141 and the second internal electrode layer 142 is a layer formed mainly of nickel, and is disposed every other layer inside the ceramic sintered body 104.

  A number of via holes 130 are formed in the ceramic sintered body 104. These via holes 130 penetrate the ceramic sintered body 104 in the thickness direction and are arranged in a lattice shape (array shape) over the entire surface. In each via hole 130, a plurality of via conductors 131 and 132 (via conductors in a capacitor) penetrating between the upper surface 102 and the lower surface 103 of the ceramic sintered body 104 are formed using nickel as a main material. Each first via conductor 131 passes through each first internal electrode layer 141 and electrically connects them to each other. Each second via conductor 132 penetrates each second internal electrode layer 142 and electrically connects them to each other.

  A plurality of first external terminal electrodes 111 and 112 protrude from the upper surface 102 of the ceramic sintered body 104. A plurality of second external terminal electrodes 121 and 122 protrude from the lower surface 103 of the ceramic sintered body 104. The first external terminal electrodes 111 and 112 on the upper surface 102 side are connected to the surface connection terminals 22 of the IC chip 21 via via conductors 43, conductor layers 42, via conductors 47, terminal pads 44 and solder bumps 45. Are electrically connected. On the other hand, the second external terminal electrodes 121 and 122 on the lower surface 103 side have via conductors 43, conductor layers 50, via conductors 47, BGA pads 48 and solder bumps 49 with respect to the electrodes (contactors) included in the mother board 60. It is electrically connected via. In addition, the substantially central portions of the bottom surfaces of the first external terminal electrodes 111 and 112 are directly connected to the end surfaces of the via conductors 131 and 132 on the top surface 102 side, and the substantially central portions of the bottom surfaces of the second external terminal electrodes 121 and 122. Are directly connected to the end surfaces of the via conductors 131 and 132 on the lower surface 103 side. Therefore, the external terminal electrodes 111 and 121 are electrically connected to the via conductor 131 and the first internal electrode layer 141, and the external terminal electrodes 112 and 122 are electrically connected to the via conductor 132 and the second internal electrode layer 142.

  The external terminal electrodes 111, 112, 121, and 122 have a layer structure in which a copper plating layer is formed on a metallized layer containing nickel as a main material. A copper plating layer consists of a metal softer than the metal which comprises a metallization layer, The surface is roughened. For this reason, the surfaces of the first external terminal electrodes 111 and 112 are rougher than the upper surface 102 of the ceramic sintered body 104. Similarly, the surfaces of the second external terminal electrodes 121 and 122 are also rougher than the lower surface 103 of the ceramic sintered body 104. Further, the external terminal electrodes 111, 112, 121, 122 when viewed from the direction perpendicular to the upper surface 102 (part thickness direction) are substantially circular (see FIG. 3).

  In the ceramic capacitor built-in wiring board 10 having the above configuration, when energization is performed from the mother board 60 side through the second external terminal electrodes 121 and 122 and a voltage is applied between the first internal electrode layer 141 and the second internal electrode layer 142, For example, positive charges are accumulated in the first internal electrode layer 141, and negative charges are accumulated in the second internal electrode layer 142, for example. As a result, the ceramic capacitor 101 functions as a capacitor. Further, in the ceramic capacitor 101, the first via conductors 131 and the second via conductors 132 are alternately arranged adjacent to each other, and the directions of the currents flowing through the first via conductors 131 and the second via conductors 132 are opposite to each other. It is set to face. Thereby, the inductance component is reduced. In addition, current is supplied to the IC chip 21 through the via conductors 131 and 132, and current is supplied to the IC chip 21 through the through-hole conductor 16, whereby the IC chip 21 operates.

  Next, a method for manufacturing the ceramic capacitor built-in wiring board 10 of the present embodiment will be described.

  In the substrate preparation step, the core substrate 11 is manufactured by a conventionally known method. In the ceramic chip preparation step, the ceramic capacitor 101 is manufactured by a conventionally known method, and the core substrate 11 and the ceramic capacitor 101 are prepared in advance.

  In the substrate preparation process, the core substrate 11 is manufactured as follows. First, a copper clad laminate is prepared in which a copper foil having a thickness of 35 μm is attached to both surfaces of a base having a length of 400 mm × width of 400 mm × thickness of 0.80 mm. Next, drilling is performed on the copper-clad laminate using a drill, and a through hole for forming the through-hole conductor 16 is formed in advance at a predetermined position. And the through-hole conductor 16 is formed by performing electroless copper plating and electrolytic copper plating according to a conventionally well-known method. Next, after the paste which has an epoxy resin as a main component is printed in the cavity part of the through-hole conductor 16, the obstruction | occlusion body 17 is formed by hardening. Further, the copper foil on both sides of the copper clad laminate is etched to pattern the conductor layer 41 by, for example, a subtractive method (see FIG. 4). Specifically, after the electroless copper plating, electrolytic copper plating is performed using the electroless copper plating layer as a common electrode. Further, the dry film is laminated, and the dry film is exposed and developed to form a dry film in a predetermined pattern. In this state, after removing unnecessary electrolytic copper plating layer, electroless copper plating layer and copper foil by etching, the dry film is peeled off.

  Next, a hole processing step is performed on the core substrate 11 using a router, and the accommodation hole 91 is formed at a predetermined position (see FIG. 5). In this hole machining step, the accommodation hole 91 is formed so that the cross-sectional shape gradually becomes wider from the core main surface 12 side (lower surface side in FIG. 5) to the core back surface 13 side (upper surface side in FIG. 5).

  In the ceramic chip preparation process, the ceramic capacitor 101 is manufactured as follows. That is, a ceramic green sheet is formed, and nickel paste for internal electrode layers is screen printed on the green sheet and dried. As a result, a first internal electrode portion that later becomes the first internal electrode layer 141 and a second internal electrode portion that becomes the second internal electrode layer 142 are formed. Next, the green sheets on which the first internal electrode portions are formed and the green sheets on which the second internal electrode portions are formed are alternately stacked, and each green sheet is integrated by applying a pressing force in the sheet stacking direction. To form a green sheet laminate.

  Further, a number of via holes 130 are formed through the green sheet laminate using a laser processing machine, and a via conductor nickel paste is filled into each via hole 130 using a paste press-fitting and filling device (not shown). Next, a paste is printed on the upper surface of the green sheet laminate, and metallized layers of the first external terminal electrodes 111 and 112 are formed so as to cover the upper end surfaces of the respective conductor portions on the upper surface side of the green sheet laminate. Further, a paste is printed on the lower surface of the green sheet laminate, and the metallized layers of the second external terminal electrodes 121 and 122 are formed so as to cover the lower end surfaces of the respective conductor portions on the lower surface side of the green sheet laminate.

  Thereafter, the green sheet laminate is dried to solidify the surface terminal part to some extent. Next, the green sheet laminate is degreased and fired at a predetermined temperature for a predetermined time. As a result, barium titanate and nickel in the paste are simultaneously sintered to form a ceramic sintered body 104. Then, electrolytic copper plating (thickness of about 10 μm) is performed on each external terminal electrode 111, 112, 121, 122 included in the obtained ceramic sintered body 104. As a result, a copper plating layer is formed on each external terminal electrode 111, 112, 121, 122, and the ceramic capacitor 101 is completed.

  After that, in the component housing step, a peelable adhesive tape 152 as a masking material is disposed in close contact with the opening 96 on the core main surface 12 side of the housing hole 91, and the opening 96 is sealed (FIG. 6). reference). The adhesive tape 152 is supported by a support base (not shown). Next, the ceramic capacitor 101 is accommodated in the accommodation hole 91 using a mounting device (manufactured by Yamaha Motor Co., Ltd.) (see FIG. 7). At this time, the ceramic capacitor 101 is attached to the adhesive tape 152 and temporarily fixed. Here, when the chip is mounted (the state shown in FIG. 1), the component first main surface 102 which is the upper surface is in close contact with the adhesive tape 152 in a state where the first main surface 102 is directed downward (the upper surface and the lower surface are reversed). . Similarly, the core substrate 11 is also in a state where the core main surface 12 which is the upper surface when the chip is mounted faces downward.

  In the component fixing step, a resin made of a thermosetting resin is provided from the opening 97 on the core back surface 13 side using a dispenser device (manufactured by Asymtek) in the gap between the inner surface of the accommodation hole 91 and the side surface of the ceramic capacitor 101. Filler 92 (Namics Co., Ltd.) is filled (see FIG. 8). Thereafter, when heat treatment is performed, the resin filler 92 is cured and the ceramic capacitor 101 is fixed in the accommodation hole 91. At this time, the positions of the core main surface 12, the component first main surface 102, and the surface of the resin filler 92 on the side in contact with the adhesive tape 152 are aligned and formed flat. Accordingly, there is almost no step between the component first main surface 102 and the core main surface 12, which is smaller than the step between the component second main surface 103 and the core back surface 13.

  Then, after fixing the ceramic capacitor 101, the adhesive tape 152 is peeled off. After that, the core main surface 12 of the core substrate 11 and the component first main surface 102 of the ceramic capacitor 101 are washed with a solvent by acid degreasing and then polished, thereby sticking to the core main surface 12 and the component first main surface 102. Remove any remaining adhesive.

  Further, the surface of the copper plating layer on the external terminal electrodes 111, 112, 121, 122 is roughened (CZ treatment). At the same time, the surface of the conductor layer 41 formed on the core main surface 12 and the core back surface 13 is also roughened. Thereafter, a cleaning process is performed, and if necessary, the core main surface 12 and the core back surface 13 may be subjected to a coupling treatment using a silane coupling agent (manufactured by Shin-Etsu Chemical Co., Ltd.).

  Next, in the first buildup layer forming step, the first buildup layer 31 is formed on the core main surface 12 based on a conventionally known technique (see FIG. 9). At this time, the second buildup layer forming step is similarly performed to form the second buildup layer 32 on the core back surface 13 (see FIG. 9). Furthermore, by forming solder bumps 45 on the terminal pads 44, solder bumps 49 on the BGA pads 48, etc., the ceramic capacitor built-in wiring board 10 is completed. In FIG. 9, the upper and lower surfaces of the core substrate 11 and the ceramic capacitor 101 in FIG. 8 are inverted (in a state where the chip is mounted). Here, there is almost no step between the component first main surface 102 and the core main surface 12, and is smaller than the step between the component second main surface 103 and the core back surface 13. Is formed flat without any irregularities. As a result, the IC chip 21 can be reliably flip-chip connected to the plurality of terminal pads 44 formed in the first buildup layer 31.

  Further, when the IC chip 21 is mounted on the ceramic capacitor built-in wiring substrate 10, the solder bumps 45 on the terminal pads 44 are reflowed to electrically connect the terminal pads 44 and the surface connection terminals 22 of the IC chip 21. Connecting. At the time of cooling after the solder bonding, the second buildup layer 32 positioned on the core back surface 13 side contracts, but the first buildup layer 31 positioned on the core main surface 12 side hardly contracts due to the presence of the IC chip 21. . As a result, the core substrate 11 warps to the core back surface 13 side. Since the ceramic capacitor 101 is less plastic than the core substrate 11 and the buildup layers 31 and 32, the ceramic capacitor 101 cannot follow the warpage. For this reason, stress concentrates toward the core back surface 13 side, but the resin filler 92 interposed between the housing hole 91 and the ceramic capacitor 101 is formed thicker toward the core back surface 13 side. Is reliably absorbed.

  Therefore, according to the present embodiment, the following effects can be obtained.

  (1) In the ceramic capacitor built-in wiring substrate 10 of the present embodiment, the cross-sectional shape of the accommodation hole 91 gradually becomes wider from the core main surface 12 side to the core back surface 13 side. Therefore, by supplying the resin filler 92 to the gap between the housing hole 91 and the ceramic capacitor 101 from the side of the core back surface 13 having a wide cross-sectional shape, the resin filler 92 can be filled without causing voids in the gap. The ceramic capacitor 101 can be securely fixed. As a result, the stress acting between the accommodation hole 91 in the core substrate 11 and the ceramic capacitor 101 can be reliably absorbed by the resin filler 92, and the occurrence of cracks can be prevented. Further, since the surface area on the core main surface 12 side of the core substrate 11 is increased, a sufficient space for providing a wiring pattern on the core main surface 12 side can be secured.

  (2) In the ceramic capacitor built-in wiring substrate 10 of the present embodiment, the ceramic capacitor 101 is a ceramic plate-like component, and the core substrate 11 is a resin material substrate, so that the IC chip 21 is flip-chip connected. In this case, during cooling after soldering, a difference in thermal expansion exists between the ceramic capacitor 101 and the core substrate 11, and stress is generated. Specifically, since the core substrate 11 warps to the core back surface 13 side and the ceramic capacitor 101 cannot follow the warp, the stress concentrates toward the core back surface 13 side. In the ceramic capacitor built-in wiring board 10 of the present embodiment, since the resin filler 92 interposed between the accommodation hole portion 91 and the ceramic capacitor 101 is thicker in the plane direction toward the core back surface 13 side, The stress concentration can be reliably absorbed, and the reliability of the wiring board 10 can be improved.

  (3) In the case of the ceramic capacitor built-in wiring board 10 of the present embodiment, the gap between the inner surface of the accommodation hole 91 and the side surface of the ceramic capacitor 101 is about 1 mm on the core back surface 13 side. Since it is equal to the interval in FIG. 12), the resin filler 92 can be reliably filled from the core back surface 13 side. Further, the gap on the core main surface 12 side is about 0.3 mm, and an appropriate gap is secured, so that it is avoided that the resin filler 92 is blocked and does not enter, and the generation of voids can be prevented. .

  (4) In the ceramic capacitor built-in wiring board 10 of the present embodiment, the step between the component first main surface 102 and the core main surface 12 is smaller than the step between the component second main surface 103 and the core back surface 13. The first buildup layer 31 can be accurately formed without a step. In this way, the IC chip 21 can be reliably flip-chip connected to each terminal pad 44 of the first buildup layer 31.

  (5) In the case of the ceramic capacitor built-in wiring substrate 10 of the present embodiment, the via array type ceramic capacitor 101 is housed in the housing hole 91 as a plate-like component. In this ceramic capacitor 101, since the plurality of via conductors 131 and 132 are arranged in an array as a whole, the inductance of the ceramic capacitor 101 can be reduced, and high-speed power supply for noise absorption and power fluctuation smoothing can be achieved. Is possible. In addition, the entire ceramic capacitor 101 can be easily reduced in size, and as a result, the entire wiring board can be easily reduced in size. In addition, a high capacitance is easily achieved for a small amount, and more stable power supply to the IC chip 21 is possible.

(6) In the present embodiment, by carrying out router processing, it is possible to accurately form the accommodation hole 91 whose cross-sectional shape gradually widens from the core main surface 12 side to the core back surface 13 side. .
[Second Embodiment]

  Hereinafter, a second embodiment of the present invention will be described with reference to the drawings. FIG. 10 shows a wiring board 10A with a built-in ceramic capacitor according to the present embodiment.

  In the present embodiment, the method of forming the resin filler 92 that fills the gap between the inner surface of the accommodation hole 91 and the side surface of the ceramic capacitor 101 is different from that of the first embodiment. That is, in the first embodiment, the resin filler 92 is filled in the gap between the inner surface of the accommodation hole portion 91 and the side surface of the ceramic capacitor 101 using the dispenser device. The ceramic capacitor 101 is fixed to the core substrate 11 by dropping a part of the resin insulating layer 34 positioned at the lowest layer of the two buildup layers 32 into the gap and filling the gap. That is, in this embodiment, the resin insulating layer 34 also serves as the resin filler 92.

  In the ceramic capacitor built-in wiring board 10A of the present embodiment, the configuration other than the resin filler 92 is the same as that of the first embodiment and is given the same reference numerals.

  When manufacturing the ceramic capacitor built-in wiring substrate 10A of the present embodiment, the substrate preparation step, the ceramic chip preparation step, the hole processing step, and the component storage step are performed in the same manner as in the first embodiment. And a buildup layer formation process is implemented after a components storage process.

  Specifically, in the second buildup layer forming step, a film-like insulating resin material mainly composed of an epoxy resin is disposed on the core back surface 13 and the component second main surface 103 so as to overlap each other. Then, the resin insulating layer 34 is formed by curing the film-like insulating resin material by pressurizing and heating in a vacuum using a vacuum press hot press machine (not shown). At this time, a part of the resin insulating layer 34 is dropped into the gap between the inner surface of the accommodation hole 91 and the side surface of the ceramic capacitor 101 to fill the gap. As a result, the ceramic capacitor 101 is fixed to the core substrate 11. After that, the second buildup layer 32 is formed by laminating the conductor layer 50 and the resin insulating layer 36 on the resin insulating layer 34 by a known method. Similarly, the first buildup layer forming step is performed to form the first buildup layer 31 in which the resin insulating layers 33 and 35 and the conductor layer 42 are laminated on the core main surface 12 and the component first main surface 102. To do. Thereby, the ceramic capacitor built-in wiring board 10A is completed.

  Thus, in the ceramic capacitor built-in wiring board 10A of the present embodiment, the resin insulating layer 34 also serves as the resin filler 92. Therefore, when forming the resin filler 92, a material different from that of the resin insulating layer 34 is used. Since it is not necessary to prepare, manufacturing cost can be reduced.

  In addition, you may change each embodiment of this invention as follows.

  In each of the above embodiments, the inner surface of the accommodation hole 91 that appears when the core substrate 11 is cut along its thickness direction is formed to be linearly inclined, but is not limited thereto. Absent. For example, like the accommodation hole portion 91A shown in FIG. If the accommodation hole 91A is formed in this way, the resin filler 92 can be easily filled in the gap between the inner surface of the accommodation hole 91A and the side surface of the ceramic capacitor 101.

  In the ceramic capacitor built-in wiring substrate 10 of each of the above embodiments, one ceramic capacitor 101 is accommodated in the accommodating hole 91 of the core substrate 11, but a plurality of plate-like components (for example, chips) are accommodated in the accommodating hole 91. A capacitor) may be embedded.

  In each of the above-described embodiments, the package form of the ceramic capacitor built-in wiring board 10 is BGA (ball grid array), but is not limited to BGA alone, for example, PGA (pin grid array), LGA (land grid array), etc. It may be.

1 is a schematic sectional view showing a ceramic capacitor built-in wiring board according to a first embodiment embodying the present invention; Similarly, the schematic sectional drawing which shows a ceramic capacitor. Similarly, the top view which shows a ceramic capacitor. Similarly, explanatory drawing which shows the manufacturing method of a wiring board. Similarly, explanatory drawing which shows the manufacturing method of a wiring board. Similarly, explanatory drawing which shows the manufacturing method of a wiring board. Similarly, explanatory drawing which shows the manufacturing method of a wiring board. Similarly, explanatory drawing which shows the manufacturing method of a wiring board. Similarly, explanatory drawing which shows the manufacturing method of a wiring board. The schematic sectional drawing which shows the ceramic capacitor built-in wiring board of 2nd Embodiment which actualized this invention. Explanatory drawing which shows the accommodation hole part in the core board | substrate of other embodiment. The schematic sectional drawing which shows the wiring board of a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10, 10A ... Wiring board with built-in ceramic capacitor as wiring board with built-in plate-like component 11 ... Core board 12 ... Core main surface 13 ... Core back surface 21 ... IC chip as semiconductor integrated circuit element 31 ... First buildup layer 32 ... First 2 buildup layers 33, 35 ... resin insulation layer as core main surface side interlayer insulation layer 34, 36 ... resin insulation layer as core back surface side interlayer insulation layer 42 ... conductor layer 44 as core main surface side conductor layer 44 ... first Terminal pad 48 as one terminal part 48 ... BGA pad as second terminal part 50 ... Conductor layer as core back side conductor layer 60 ... Mother board 91, 91A as other substrate ... Housing hole part 92 ... Resin filler 96 ... Opening on the core main surface side 97... Opening on the core back surface side 101... Ceramic capacitor as a plate-shaped component 102... Component first main surface 103. , 132 ... via conductors as via conductors within the capacitor

Claims (10)

A core substrate having a core main surface and a core back surface, and having an accommodation hole opening at the core main surface and the core back surface;
The housing has a component first main surface and a component second main surface, and the component first main surface faces the core main surface and the component second main surface faces the core back surface. A plate-shaped part housed in
It has a structure in which a core main surface side interlayer insulating layer and a core main surface side conductor layer are stacked and arranged on the core main surface and the component first main surface, and a semiconductor integrated circuit element is flipped on the surface layer. A first buildup layer in which a plurality of first terminal portions that can be chip-connected are formed;
It has a structure in which a core back-side interlayer insulating layer and a core back-side conductor layer are stacked, and is disposed on the core back and the component second main surface, and a plurality of second layers that can be connected to other substrates on the surface layer. A second buildup layer having two terminal portions formed thereon;
A resin filler that fixes the plate-like component to the core substrate by filling a gap between the inner surface of the accommodation hole and the side surface of the plate-like component;
The cross-sectional shape of the accommodation hole portion which appears when the core substrate was cut along its thickness direction, said have gradually wider in accordance with the core main surface side toward the core back surface side Rutotomoni,
The resin filler that fills the gap between the inner surface of the accommodation hole and the side surface of the plate-like component is thicker toward the back side of the core,
The plate-part built-in wiring , wherein the resin filler is connected to the core main surface side interlayer insulating layer constituting the first buildup layer on the core main surface side. substrate.   The size of the gap is 0.3 mm or more and 0.5 mm or less on the core main surface side, and 0.8 mm or more and 1 mm or less on the core back surface side. Wiring board with built-in plate components.   The wiring board with a built-in plate-like component according to claim 1 or 2, wherein an inner surface of the accommodation hole that appears when the core substrate is cut along a thickness direction thereof is curved in a concave shape.   4. The step according to claim 1, wherein a step between the component first main surface and the core main surface is smaller than a step between the component second main surface and the core back surface. Wiring board with built-in plate components.   The board-internal wiring board according to any one of claims 1 to 4, wherein the core back side interlayer insulating layer also serves as the resin filler.   6. The wiring board with a built-in plate-shaped component according to claim 1, wherein the plate-shaped component is a via array type ceramic capacitor having a plurality of via conductors in the capacitor. A core substrate having a core main surface and a core back surface, and having a receiving hole portion opening at the core main surface and the core back surface; a component first main surface and a component second main surface; A method of manufacturing a wiring board comprising a plate-like component housed and fixed in
An accommodation hole is formed such that a cross-sectional shape of the accommodation hole that appears when the core substrate is cut along the thickness direction gradually widens from the core main surface side to the core back surface side. A hole drilling process to form on the substrate;
In the state where the opening on the core main surface side in the accommodation hole is sealed, the component first main surface is directed to the core main surface side, and the component second main surface is directed to the core back surface side, A component housing step of housing and arranging the plate-shaped component in the housing hole;
A resin filler that is thicker toward the core back surface side by supplying a resin filler from the opening on the core back surface side in the housing hole portion, and an inner surface of the housing hole portion and a side surface of the plate-like component a component fixing step of filling the gap to fix the plate-like component on the core substrate,
The core main surface which forms the first buildup layer on the core main surface side while forming the first buildup layer on the core main surface and on the resin filler And a first build-up layer forming step of connecting to the side interlayer insulating layer .   The method for manufacturing a wiring board with a built-in plate-like component according to claim 7, wherein in the hole processing step, the accommodation hole is processed and formed by router processing. It has a structure in which a core main surface side interlayer insulating layer and a core main surface side conductor layer are stacked and arranged on the core main surface and the component first main surface, and a semiconductor integrated circuit element is flipped on the surface layer. 9. The first buildup layer forming step of forming a first buildup layer in which a plurality of first terminal portions that can be connected to a chip are formed is performed after the component housing step. Method for manufacturing a wiring board with built-in plate-like components.   It has a structure in which a core back-side interlayer insulating layer and a core back-side conductor layer are stacked, and is disposed on the core back and the component second main surface, and a plurality of second layers that can be connected to other substrates on the surface layer. A second buildup layer forming step for forming a second buildup layer on which two terminal portions are formed is performed after the component housing step, and a part of the core main surface side interlayer insulating layer located at the lowermost layer is formed. 10. The manufacturing of a wiring board with a built-in plate-like component according to claim 7, wherein the plate-like component is fixed to the core substrate by being dropped into the gap and filling the gap. Method.

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