JP6907898B2 - Structure with built-in electronic components - Google Patents

Description

The present invention relates to a structure having a built-in electronic component.

Patent Document 1 discloses a structure having an electronic component built-in structure having a laminated structure and incorporating an electronic component. This electronic component built-in structure has a first main surface and a second main surface facing each other in the stacking direction on both sides of the structure, and is located on the first main surface side and has an opening (cavity portion). It is provided with a first insulating layer in which the above is formed, an electronic component arranged in the cavity portion, and a second insulating layer located on the second main surface side and covering the cavity portion and the electronic component. The second insulating layer is inserted between the inner wall surface (side wall surface) of the cavity portion and the electronic component.

Japanese Unexamined Patent Publication No. 2016-207957

In the structure with built-in electronic components described in Patent Document 1, the side wall surface of the cavity portion is inclined with respect to the stacking direction of the structure with built-in electronic components. On the other hand, the side surface of the electronic component arranged in the cavity portion is not inclined with respect to the stacking direction and extends in the stacking direction. For this reason, the amount of the second insulating layer that penetrates between the side wall surface of the cavity portion and the side surface of the electronic component is large, which causes a decrease in the flatness of the second main surface of the electronic component built-in structure.

An object of the present invention is to provide a structure having a built-in electronic component capable of improving the flatness of a main surface.

The electronic component-embedded structure according to one embodiment of the present invention is an electronic component-embedded structure having a first main surface and a second main surface opposite to the first main surface. The first insulating layer constituting the main surface of No. 1, the connecting portion laminated on the second main surface side of the first insulating layer, the electronic component mounted on the connecting portion, and the first insulating layer are electronic components. The second insulating layer includes the first layer and the second layer which are laminated in order from the side of the first insulating layer, and the first layer of the second insulating layer includes a second insulating layer which is integrally covered with the first insulating layer. Has a cavity in which the connection is exposed and electronic components are arranged, the cavity has a side wall whose normal direction is inclined toward the second main surface, and the electronic component is The second layer of the second insulating layer is between the side wall surface of the cavity and the side surface of the electronic component, and has a side surface facing the side wall surface and having a normal direction inclined toward the first main surface side. It's getting in.

In this electronic component built-in structure, the side surface of the electronic component is inclined in a direction approaching parallel to the side wall surface of the cavity portion from the state extending in the stacking direction of the electronic component built-in structure. As a result, the amount of the second layer of the second insulating layer that enters between the side wall surface of the cavity portion and the side surface of the electronic component is reduced as compared with the state in which the side surface of the electronic component extends in the stacking direction. Therefore, it is possible to improve the flatness of the second main surface of the structure with built-in electronic components.

In one form, the inclination angle of the side surface of the electronic component with respect to the stacking direction of the electronic component built-in structure is equal to or less than the inclination angle of the side wall surface with respect to the stacking direction. When the inclination angle of the side surface of the electronic component with respect to the stacking direction is larger than the inclination angle of the side wall surface with respect to the stacking direction, the distance between the side surface and the side wall surface is narrowed on the second layer side, so that when the second layer is formed. In addition, the material constituting the second layer does not easily enter between the side surface and the side wall surface. On the other hand, by setting the inclination angle of the side surface of the electronic component with respect to the stacking direction to be equal to or less than the inclination angle of the side wall surface with respect to the stacking direction, the material constituting the second layer of the second insulating layer is the side surface of the electronic component. It is easy to fill the space between the cavity and the side wall surface.

In one form, the electronic component built-in structure further comprises an insulator interposed between the electronic component and the side wall surface of the cavity. In this case, since the amount of the second layer of the second insulating layer that has entered between the side wall surface of the cavity portion and the side surface of the electronic component is further reduced, the second main surface can be further flattened. ..

In one form, both the side surface of the electronic component and the side wall surface of the cavity portion are uniformly inclined from one end to the other end in the stacking direction of the electronic component built-in structure. According to this configuration, a flat second main surface is obtained as compared with the case where the side surface or the side wall surface is partially inclined.

According to the present invention, there is provided a structure with built-in electronic components capable of improving the flatness of the main surface.

It is sectional drawing which shows schematicly the structure with built-in electronic component which concerns on one Embodiment of this invention. It is sectional drawing which showed an example of the mounting state of the structure with built-in electronic component shown in FIG. It is a cross-sectional view which showed the electronic component and a part of the cavity part of the structure with built-in electronic component shown in FIG. 1 in an enlarged manner. It is a figure which showed each process of the manufacturing method of the electronic component built-in structure shown in FIG. It is a figure which showed each process of the manufacturing method of the electronic component built-in structure shown in FIG. It is a figure which showed each process of the manufacturing method of the electronic component built-in structure shown in FIG. It is a figure which showed each process of the manufacturing method of the electronic component built-in structure shown in FIG. It is a figure which showed the modification of the manufacturing method of the electronic component built-in structure shown in FIG. It is a figure which showed the modification of the manufacturing method of the electronic component built-in structure shown in FIG.

Hereinafter, various embodiments will be described in detail with reference to the drawings. In each drawing, the same or corresponding parts are designated by the same reference numerals, and duplicate description will be omitted.

FIG. 1 is a cross-sectional view schematically showing an electronic component built-in structure according to an embodiment of the present invention. As shown in FIG. 1, the electronic component built-in structure 1 is a structure containing the electronic component 10 described later, and is used for, for example, a communication terminal or the like. The structure 1 with built-in electronic components has a laminated structure in which the second insulating layer 30 is laminated on the first insulating layer 20. The first insulating layer 20 and the second insulating layer 30 are made of an insulating material such as an epoxy resin, a polyimide resin, an acrylic resin, or a phenol resin. The insulating material constituting the second insulating layer 30 may be a material whose hardness changes depending on a specific treatment, such as a thermosetting resin or a photocurable resin. The lower surface of the first insulating layer 20 constitutes one main surface (first main surface) 1a of the electronic component built-in structure 1, and the upper surface of the second insulating layer 30 is opposite to the first main surface 1a. It constitutes the main surface (second main surface) 1b on the side.

A plurality of first electrode terminals 42 are provided on the first main surface 1a of the electronic component built-in structure 1. The first electrode terminal 42 is made of a conductive material such as Cu. In the present embodiment, each of the first electrode terminals 42 is provided so as to overlap the main surface 1a, but may be provided in a state of being embedded in the first insulating layer 20. As shown in FIG. 2, each first electrode terminal 42 is provided with, for example, a solder bump 43. Each of the first electrode terminals 42 is connected to an external substrate (not shown) facing the first main surface 1a of the electronic component built-in structure 1 via a solder bump 43.

Returning to FIG. 1, a plurality of second electrode terminals 44 are also provided on the second main surface 1b of the electronic component built-in structure 1. Like the first electrode terminal 42, the second electrode terminal 44 is made of a conductive material such as Cu. In the present embodiment, each of the second electrode terminals 44 is provided so as to overlap the main surface 1b, but may be provided in a state of being embedded in the second insulating layer 30. As shown in FIG. 2, each second electrode terminal 44 is provided with, for example, a solder bump 45. Then, the second electrode terminal 44 is connected to an external electronic component 50 such as an IC mounted on the second main surface 1b of the electronic component built-in structure 1 via a solder bump 45.

As shown in FIG. 1, a wiring 46 and a connecting portion 48 are formed on the first insulating layer 20. Since the wiring 46 and the connecting portion 48 are both formed by patterning the conductive layer as described later, the wiring 46 and the connecting portion 48 exist in the same layer and have the same thickness. The wiring 46 and the connecting portion 48 are made of a conductive material such as Cu. In this embodiment, the electronic component built-in structure 1 has a pair of connecting portions 48. Each of the wiring 46 and the connecting portion 48 is formed through the first insulating layer 20 so as to extend in the thickness direction of the first insulating layer 20 (that is, the stacking direction of the electronic component built-in structure 1). It is electrically connected to the first electrode terminal 42 via the via conductor 62.

The electronic component 10 is provided on the pair of connecting portions 48 so as to straddle the pair of connecting portions 48. The electronic component 10 has a pair of first electrode layers 11 provided on the lower side and a pair of second electrode layers 12 provided on the upper side so as to correspond to each of the pair of connecting portions 48. In the present embodiment, the electronic component 10 is a thin film capacitor including a dielectric layer 13 arranged between a pair of first electrode layers 11 and a pair of second electrode layers 12, and includes two capacitor structures. There is. As an example, the electronic component 10 has an overall thickness of 10 μm to 80 μm, a thickness of the first electrode layer 11 of 0.1 μm to 20 μm, a thickness of the second electrode layer 12 of 0.1 μm to 30 μm, and a dielectric layer 13 of the electronic component 10. The thickness of the can be designed to be 0.05 μm to 0.4 μm. The electronic component 10 is connected to the connecting portion 48 via a conductive material layer 15 such as a solder layer. As the material of the first electrode layer 11, Cu or a Cu alloy is used as an example. As an example, Ni or a Ni alloy is used as the material of the second electrode layer 12. As an example, a perovskite-based dielectric material is used as the material of the dielectric layer 13. Here, the electronic component 10 may be a so-called multilayer thin film capacitor having a laminated structure in which a plurality of dielectric layers 13 and a plurality of internal electrode layers are alternately laminated.

The second insulating layer 30 has a two-layer structure including a first layer 32 and a second layer 34. That is, the second insulating layer 30 is composed of the first layer 32 and the second layer 34, which are laminated in order from the side of the first insulating layer 20.

The first layer 32 of the second insulating layer 30 covers each wiring 46 formed on the first insulating layer 20, and the cavity portion 33 is located in a region corresponding to the connecting portion 48 formed on the first insulating layer 20. Has. The cavity portion 33 penetrates the first layer 32 in the stacking direction, and is opened so that the connecting portion 48 on the first insulating layer 20 is exposed. The opening size of the cavity 33 is designed to be larger than the size of the electronic component 10, and the electronic component 10 is housed in the cavity 33 and the first electrode of the electronic component 10 in the cavity 33. The layer 11 is connected to the connecting portion 48.

Below the electronic component 10, there is a space V defined by the electronic component 10 housed in the cavity 33 and the first insulating layer 20. The space V is filled with an insulating resin (insulator) 70. The insulating resin 70 is made of, for example, a low dielectric constant material (epoxy resin containing a filler) or an underfill material. Each of the wirings 46 located below the electronic component 10 is covered with an insulating resin 70. The insulating resin 70 is also provided between the electronic component 10 and the first layer 32 in the cavity 33.

The second layer 34 of the second insulating layer 30 integrally covers the first layer 32 and the electronic component 10 housed in the cavity 33. A plurality of second via conductors 64 are formed in the second layer 34 so as to extend in the thickness direction thereof (that is, the stacking direction of the electronic component built-in structure 1), and these second via conductors 64 are provided. The second electrode layer 12 of the electronic component 10 is electrically connected to the second electrode terminal 44 via the electronic component 10. In addition to the second via conductor 64 that penetrates only the second layer 34 shown in FIGS. 1 and 2, the plurality of second via conductors 64 have a second insulation, which is not shown in FIGS. 1 and 2. A second via conductor 64 that penetrates the layer 30 (first layer 32 and second layer 34) and connects the wiring 46 and the second electrode terminal 44 may also be included.

Next, the electronic component 10 and the cavity 33 will be described in detail with reference to FIG. As shown in FIG. 3, the cavity portion 33 has a side wall surface 33a, and the electronic component 10 has a side surface 10a facing the side wall surface 33a of the cavity portion 33. The second layer 34 is in a state of being inserted between the side wall surface 33a and the side surface 10a. Further, an insulating resin 70 is interposed between the side wall surface 33a and the side surface 10a. The insulating resin 70 is provided on the first insulating layer 20 side of the second layer 34.

The normal direction of the side wall surface 33a of the cavity portion 33 (the direction away from the side wall surface 33a, that is, the normal vector of the side wall surface 33a) N2 is inclined toward the second main surface 1b. That is, the side wall surface 33a is inclined so that the opening width of the cavity 33 gradually widens from the first main surface 1a side toward the second main surface 1b (see FIG. 1), and the stacking direction (reference). The inclination angle θ2 is formed with respect to the direction parallel to the line A). Further, the side wall surface 33a is a flat surface and is uniformly inclined from one end to the other end in the stacking direction.

The side surface 10a is composed of the ends of the first electrode layer 11, the dielectric layer 13, and the second electrode layer 12 of the electronic component 10. The normal direction of the side surface 10a (the direction away from the side surface 10a, that is, the normal vector of the side surface 10a) N1 is inclined toward the first insulating layer 20 side (the first main surface 1a side (see FIG. 1)). That is, the side surface 10a is inclined so that the width of the electronic component 10 increases from the side of the first main surface 1a toward the side of the second main surface 1b (see FIG. 1). In other words, it is inclined in a direction approaching the same direction with respect to the side wall surface 33a of the cavity portion 33 from the state extending in the stacking direction (see the two-dot chain line in FIG. 3). The side surface 10a forms an inclination angle θ1 with respect to the stacking direction (reference line A). Further, the side surface 10a is a flat surface and is uniformly inclined from one end to the other end in the stacking direction.

The inclination angle θ1 of the side surface 10a of the electronic component 10 with respect to the stacking direction is set to be an angle equal to or less than the inclination angle θ2 of the side wall surface 33a with respect to the stacking direction. As an example, the inclination angle θ1 of the side surface 10a can be determined within the range of 0 ° <θ1 ≦ 15 °, and the inclination angle θ2 of the side wall surface 33a can be determined within the range of 0 ° <θ2 ≦ 30 °. can. It is preferable that the inclination angle θ1 of the side surface 10a and the inclination angle θ2 of the side wall surface 33a are equal, that is, the side surface 10a and the side wall surface 33a are parallel.

Next, a method of manufacturing the electronic component built-in structure 1 will be described with reference to FIGS. 4 to 7.

4 to 7 show a manufacturing method for manufacturing one electronic component-embedded structure 1, but in reality, after forming a plurality of structures of the electronic component-embedded structure 1 on one wafer, individual pieces are formed. A plurality of electronic component built-in structures 1 are manufactured at one time. Therefore, in FIGS. 4 to 7, a part of the wafer (a part corresponding to one electronic component built-in structure 1) is enlarged and shown.

When manufacturing the electronic component built-in structure 1, first, as shown in FIG. 4A, a wafer W having a function as a support substrate is prepared, and a temporary adhesive layer L is formed on the wafer W. .. The material of the wafer W is not particularly limited, and for example, a glass wafer or the like can be used. The temporary adhesive layer L can be formed by a known method such as spin coating. A wafer W on which the temporary adhesive layer L is formed in advance may be prepared.

Next, as shown in FIG. 4B, a seed layer S is formed on the temporary adhesive layer L. The seed layer S is made of a conductive material such as Cu. Further, as shown in FIG. 4C, the first insulating layer 20 is laminated on the seed layer S, and the first insulating layer 20 is patterned by using a known patterning technique, and each of the first vias described above is used. A through hole 20a is provided in the first insulating layer 20 at a position where the conductor 62 is formed. Then, a plating layer is formed on the patterned first insulating layer 20 by electrolytic plating. Of the plating layers, the plating layer formed in the through hole 20a of the first insulating layer 20 constitutes the first via conductor 62, and the plating layer formed on the first insulating layer 20 is the wiring 46 and the connecting portion 48. To configure.

Next, as shown in FIG. 5A, the first layer 32 of the second insulating layer 30 is formed so as to completely cover the first insulating layer 20 on which the plating layer is formed. The first layer 32 of the second insulating layer 30 is patterned by using a known patterning technique, and the cavity portion 33 is provided in the region corresponding to the connecting portion 48 formed on the first insulating layer 20.

Next, as shown in FIG. 5B, the electronic component 10 is installed in the cavity 33, and the component 18 to be the electronic component 10 in the cavity 33 is connected via the conductive material layer 15 to the connecting portion 48. Connected to. The component 18, which should be the electronic component 10, has one Ni thick film electrode 12A, which should be the pair of second electrode layers 12. Before or after the component 18 to be the electronic component 10 is installed, the space V defined by the component 18 to be the electronic component 10 and the first insulating layer 20 is filled with the insulating resin 70. As a result, each of the wirings 46 located below the component 18 that should be the electronic component 10 is covered with the insulating resin 70. Further, in the cavity portion 33, the insulating resin 70 is also formed between the electronic component 10 and the first layer 32.

Then, as shown in FIG. 5C, a resist 82 is provided so as to surround the component 18 to be the electronic component 10 and an etching process is performed to reduce the thickness of the Ni thick film electrode 12A. Then, as shown in FIG. 6A, the resist 84 is provided so as to cover the region to be the second electrode layer 12 of the resist 82 and the Ni thick film electrode 12A, and the etching process is performed. As a result, as shown in FIG. 6B, an electronic component 10 having a pair of second electrode layers 12 is obtained. After the etching treatment, the resists 82 and 84 are removed.

Next, as shown in FIG. 7A, the first layer 32 and the electronic component 10 housed in the cavity 33 are integrally covered, and the second insulation constituting the second main surface 1b is formed. The second layer 34 of the layer is formed (third step). Then, the second layer 34 is patterned using a known patterning technique, and a through hole 34a is provided in the second layer 34 at a position where each of the above-mentioned second via conductors 64 is formed. As a result, the second insulating layer 30 is formed.

Then, it penetrates the second insulating layer 30 (second layer 34) and forms the second via conductor 64 to be connected to the second electrode terminal 44. Specifically, as shown in FIG. 7B, a plating layer is formed on the second layer 34 of the patterned second insulating layer 30 by electrolytic plating. Of the plating layers, the plating layer formed in the through hole 34a of the second layer 34 of the second insulating layer 30 constitutes the second via conductor 64 and is formed on the second layer 34 of the second insulating layer 30. The plated layer constitutes the second electrode terminal 44.

Finally, the temporary adhesive layer L and the wafer W are removed, and the first electrode terminal 42 is provided on the first main surface 1a exposed by the removal to complete the electronic component built-in structure 1 described above. After that, the external electronic component 50 (see FIG. 2) is mounted on the electronic component built-in structure 1. At this time, the external electronic component 50 is electrically connected to the second electrode terminal 44 via the solder bump 45. Then, the external electronic component 50 is sealed with a resin or the like.

Unlike the manufacturing method described above, after the process of forming the second electrode terminal 44 shown in FIG. 7B, the external electronic component 50 is mounted on the second main surface 1b as shown in FIG. After the resin is sealed, the temporary adhesive layer L and the wafer W may be removed. After that, by providing the first electrode terminal 42 on the first main surface 1a exposed by removal, the electronic component built-in structure 1 is completed.

Further, as shown in FIG. 9, a component-encapsulated wafer in which the external electronic component 50 is enclosed may be used instead of the wafer W. In this case, the electronic component built-in structure 1 obtained through the steps after FIG. 4C described above may be formed on the component-encapsulated wafer in which the connection terminal 51 of the external electronic component 50 is exposed on the upper surface.

As described above, in the structure 1 with built-in electronic components, the cavity portion 33 has a side wall surface 33a whose normal direction N2 is inclined toward the second main surface 1b. Further, the electronic component 10 has a side surface 10a that faces the side wall surface 33a and whose normal direction N1 is inclined toward the first main surface 1a. That is, as shown in FIG. 3, the side surface 10a of the electronic component 10 is inclined in a direction approaching parallel to the side wall surface 33a of the cavity 33 from the state extending in the stacking direction. As a result, the cavity portion 33 is formed when the second layer 34 shown in FIG. 7A is formed, as compared with the state in which the side surface 10a of the electronic component 10 extends in the stacking direction (see the two-dot chain line in FIG. 3). The amount of the second layer 34 that penetrates between the side wall surface 33a of the electronic component 10 and the side surface 10a of the electronic component 10 is reduced. Generally, it is known that a resin material shrinks when it is cured. Therefore, since the influence of the curing shrinkage of the material constituting the second layer 34 is reduced, the flatness of the second main surface 1b of the electronic component built-in structure 1 can be improved. For example, when a depression is formed in the second main surface 1b due to curing shrinkage of the material constituting the second layer 34, the amount of the second layer 34 entering between the side wall surface 33a and the side surface 10a is reduced. As a result, the formed dent can be reduced.

Further, in a general structure with a built-in electronic component, it is preferable that the opening width of the cavity portion is large from the viewpoint of ease of mounting when the electronic component is arranged in the cavity portion. However, if the opening width of the cavity portion is increased, the gap between the electronic component and the cavity portion becomes large, so that the mounting accuracy of the electronic component may be lowered and the reliability of the electrical connection may be lowered. On the other hand, in the structure 1 with built-in electronic components, the side wall surface 33a is inclined so that the opening width of the cavity 33 gradually widens from the first main surface 1a side to the second main surface 1b side. As a result, it is possible to suppress a decrease in mounting accuracy of the electronic component 10 while ensuring ease of mounting when the electronic component 10 is arranged in the cavity 33. In addition, when the side surface 10a of the electronic component 10 and the side wall surface 33a of the cavity 33 are inclined in the same direction, the electronic component 10 is arranged in the cavity 33 (see FIG. 5B). In addition, the side surface 10a and the side wall surface 33a automatically align the electronic components 10. Therefore, it is possible to facilitate the alignment when arranging the electronic component 10.

Further, the inclination angle θ1 of the side surface 10a of the electronic component 10 with respect to the stacking direction of the electronic component built-in structure 1 is equal to or less than the inclination angle θ2 of the side wall surface 33a with respect to the stacking direction. When the inclination angle θ1 of the side surface 10a of the electronic component 10 with respect to the stacking direction is larger than the inclination angle θ2 of the side wall surface 33a with respect to the stacking direction, the distance between the side surface 10a and the side wall surface 33a on the second main surface 1b side is large. Since it is narrowed, when the second layer 34 shown in FIG. 7A is formed, it is difficult for the material constituting the second layer 34 to enter between the side surface 10a and the side wall surface 33a. On the other hand, by setting the inclination angle θ1 of the side surface 10a of the electronic component 10 to be equal to or less than the inclination angle θ2 of the side wall surface 33a, the material constituting the second layer 34 is the side surface 10a of the electronic component 10 and the cavity 33. It becomes easy to be filled between the side wall surface 33a and the side wall surface 33a.

Further, the electronic component built-in structure 1 further includes an insulating resin 70 interposed between the electronic component 10 and the side wall surface 33a of the cavity 33. The insulating resin 70 is formed on the first main surface 1a side of the space defined between the electronic component 10 and the cavity portion 33. Therefore, of the above spaces, the empty space on the second main surface 1b side into which the second layer 34 of the second insulating layer 30 enters is small. As a result, the amount of the second layer 34 that enters between the side wall surface 33a of the cavity portion 33 and the side surface 10a of the electronic component 10 is further reduced, so that the influence of the curing shrinkage of the material constituting the second layer 34 is further further reduced. Can be reduced.

Further, both the side surface 10a of the electronic component 10 and the side wall surface 33a of the cavity 33 are uniformly inclined from one end to the other end in the stacking direction of the electronic component built-in structure 1. As a result, when the second layer 34 is formed, the material constituting the second layer 34 is between the side surface 10a and the side wall surface 33a, as compared with the case where the side surface 10a or the side wall surface 33a is partially inclined. It becomes easier to enter.

1 ... Electronic component built-in structure, 1a ... First main surface, 1b ... Second main surface, 10 ... Electronic component, 10a ... Side surface, 20 ... First insulating layer, 30 ... Second insulating layer, 32 ... 1st layer, 33 ... Cavity part, 33a ... Side wall surface, 34 ... 2nd layer, 48 ... Connection part, 62 ... 1st via conductor, 64 ... 2nd via conductor, 70 ... Insulating resin (insulator), N1, N2 ... normal direction, θ1, θ2 ... tilt angle.

Claims (4)

An electronic component built-in structure having a first main surface and a second main surface opposite to the first main surface.
The first insulating layer constituting the first main surface and
With the connecting portion laminated on the second main surface side of the first insulating layer,
Electronic components mounted on the connection and
A second insulating layer that integrally covers the first insulating layer with the electronic component is provided.
The second insulating layer includes a first layer and a second layer laminated in order from the side of the first insulating layer.
The first layer of the second insulating layer has a cavity portion in which the connection portion is exposed and the electronic component is arranged.
The cavity portion has a side wall surface whose normal direction is inclined toward the second main surface side.
The electronic component has a side surface facing the side wall surface and having a normal direction inclined toward the first main surface side.
The second layer of the second insulating layer is an electronic component built-in structure that is inserted between the side wall surface of the cavity portion and the side surface of the electronic component. The electronic component built-in structure according to claim 1, wherein the inclination angle of the side surface of the electronic component with respect to the stacking direction of the electronic component built-in structure is equal to or less than the inclination angle of the side wall surface with respect to the stacking direction. The electronic component built-in structure according to claim 1 or 2, further comprising an insulator interposed between the electronic component and the side wall surface of the cavity portion. Any one of claims 1 to 3, wherein both the side surface of the electronic component and the side wall surface of the cavity portion are uniformly inclined from one end to the other end in the stacking direction of the electronic component built-in structure. The structure with built-in electronic components described in.

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