JP5067280B2 - Semiconductor wafer measuring device - Google Patents

Description

  The present invention relates to a semiconductor wafer measuring apparatus for testing a semiconductor device formed on a wafer by applying a voltage by bringing a pair of probes into contact with the semiconductor wafer.

  A semiconductor device such as an integrated circuit (IC) in a wafer state is generally tested and evaluated by bringing a probe into contact with an electrode pad formed on the wafer by a semiconductor wafer measuring device during the manufacturing process. In the inspection by the semiconductor wafer measuring apparatus, a method is generally used in which a probe card having electrical contacts arranged in advance in accordance with the arrangement of the electrode pads of the IC is prepared and measured by pressing the probe card against the wafer with a driving device. Yes.

  An example of the probe card is disclosed in Japanese Patent Laid-Open No. 10-288628 (Patent Document 1). FIG. 6 is a diagram showing a configuration example of a conventional typical probe card disclosed in Patent Document 1. In FIG.

  A probe card 1 shown in FIG. 6 includes a disc-shaped base 3 having an opening 2 in the center, a plurality of terminal pins 4 erected on a concentric circle in the vicinity of the outer peripheral edge of the base 3, and the outside of the opening 2 And a plurality of blades 5 and conductive needles 6 provided radially. The blade 5 and the terminal pin 4 are connected by wiring as necessary.

  The necessary number of blades 5 is prepared according to the number of IC pads to be measured, and is fixed to a pattern provided on the surface of the substrate 3 (not shown) by soldering. At this time, each blade 5 is fixed so that the tip of the conductive needle 6 fixed to the tip is in a predetermined position.

At the time of measurement, the probe card 1 is held at a position facing the wafer to be measured placed on the stage. Here, the stage moves three-dimensionally so that a predetermined electrode pad on the wafer is brought into contact with a predetermined needle 6 of the probe card 1. In this state, the IC performance is evaluated by applying a voltage from the measuring device to the IC on the wafer via the terminal pin 4, the blade 5, and the conductive needle 6.
JP-A-10-288628

  In some cases, a high-voltage semiconductor element may be formed on the wafer to be measured of the semiconductor wafer measuring apparatus. At this time, inspection in a state where a high voltage is applied is necessary. In the conventional semiconductor wafer measuring apparatus, when the distance between the electrode pads to be inspected is 1 mm, the voltage allowed for measurement is 1000V. However, for example, in recent inspections of high-voltage semiconductor elements for in-vehicle use, inspection with a voltage exceeding 1000 V is required, and voltage application of a maximum of several thousand V may be necessary. For this reason, dielectric breakdown between the electrode pads (probes) due to the discharge that has not become apparent until now has become a problem in the measurement of the high breakdown voltage semiconductor element.

  Therefore, the present invention is a semiconductor wafer measuring apparatus for testing a semiconductor device formed on a wafer by applying a voltage by bringing a pair of probes into contact with the semiconductor wafer, and dielectric breakdown does not occur even when a high voltage is applied. An object of the present invention is to provide a semiconductor wafer measuring apparatus that is unlikely to occur and that can perform a highly reliable test even on a semiconductor device having a high breakdown voltage.

A first aspect of the present invention is a semiconductor wafer measuring apparatus for testing a semiconductor device formed on a wafer by applying a voltage by bringing a pair of probes into contact with the semiconductor wafer, the pair contacting the wafer. An insulating member that separates the pair of probes and separates the pair of probes is interposed between the tips of the probes so as to be in contact with the wafer.

  The semiconductor wafer measuring apparatus is interposed between the probe tips when a high voltage is applied to a pair of probes or when a large electric field strength is generated due to a small probe tip interval even if the applied voltage is low. With the insulating member, the electric field strength can be relaxed. In particular, since the insulating member is interposed so as to be in contact with the wafer, it is possible to effectively suppress the interfacial discharge on the wafer where dielectric breakdown is most likely to occur. Therefore, even when a high voltage is applied, dielectric breakdown due to discharge between the probes can be prevented and measurement reliability can be improved.

  As described above, the semiconductor wafer measurement apparatus is a semiconductor wafer measurement apparatus for testing a semiconductor device formed on the wafer by applying a voltage by bringing a pair of probes into contact with the semiconductor wafer. It is possible to provide a semiconductor wafer measuring apparatus that does not easily cause dielectric breakdown even when high voltage is applied, and that can perform a highly reliable test even for a high breakdown voltage semiconductor device.

Further, the semiconductor wafer measuring device, a pre-Symbol insulating member, spaced from the said pair of probes, Ru Tei is interposed so as to partition the pair of probes. For this reason , high voltage measurement is possible and the tip of the probe is easy to visually recognize, so that the probe can easily contact the electrode pad of the semiconductor device formed on the wafer.

In the semiconductor wafer measuring apparatus, as described in claim 2 , for example, the insulating member partitions the first insulating portion that divides the vicinity of the tip of the pair of probes and the second that partitions the vicinity of the tip of the pair of probes. The second insulating portion may be configured to have a lower hardness than the first insulating portion. According to this, by setting the hardness of the second insulating portion in contact with the wafer as appropriate, occurrence of contact scratches on the wafer by the insulating member can be suppressed.

In the semiconductor wafer measuring apparatus, as described in claim 3 , the distance between the tips of the pair of probes is set wider than the distance between the tips of the pair of probes. Discharge can be made difficult to occur.

Further, as described in claim 4 , the pair of probes may be arranged in a vacuum or in an inert atmosphere. This also makes it difficult for discharge to occur.

As the insulating member in the semiconductor wafer measuring apparatus, for example, a silicone resin having insulating properties and appropriate hardness can be employed as described in claim 5 .

In the semiconductor wafer measuring apparatus, as described in claim 6 , the pair of probes is a so-called probe card arranged on a removable base, and the insulating member is fixed to the base. It is possible to adopt a configuration as follows. By preparing the probe card in accordance with the electrode pad of the semiconductor device formed on the wafer, the test of the semiconductor device can be easily performed in a high voltage application state.

  As described above, the semiconductor wafer measurement apparatus is a semiconductor wafer measurement apparatus for testing a semiconductor device formed on the wafer by applying a voltage by bringing a pair of probes into contact with the semiconductor wafer. Even when a voltage is applied, dielectric breakdown does not easily occur, and a semiconductor wafer measuring apparatus capable of performing a highly reliable test even for a high breakdown voltage semiconductor device.

Therefore, as described in claim 7 , the semiconductor wafer measuring apparatus is suitable for applying a voltage of 1000 V or more to the pair of probes, which cannot be handled by the conventional semiconductor wafer measuring apparatus.

  The best mode for carrying out the present invention will be described below with reference to the drawings.

  FIG. 1 is a view showing an example of a semiconductor wafer measuring apparatus according to the present invention, FIG. 1 (a) is a schematic perspective view of a semiconductor wafer measuring apparatus 100, and FIG. 1 (b) is a semiconductor wafer measuring apparatus. 10 is an enlarged cross-sectional view of the surroundings of probes 6a and 6b in 100. FIG. In each example of the semiconductor wafer measuring apparatus shown below, the same reference numerals are given to the same parts as the parts of the probe card 1 shown in FIG.

  A semiconductor wafer measuring apparatus 100 shown in FIG. 1 applies a voltage to a semiconductor wafer 7 placed on a pedestal 9 by bringing a pair of probes (needles) 6a and 6b into contact with the semiconductor wafer 7 to form a semiconductor device formed on the wafer 7. A semiconductor wafer measuring device to be tested. A pair of probes 6 a and 6 b in the semiconductor wafer measuring apparatus 100 is disposed on a removable base 3 having an opening 2, and a so-called probe card 11 is configured.

  In the semiconductor wafer measuring apparatus 100 of FIG. 1, an insulating member 8 a is interposed between the tips of a pair of probes 6 a and 6 b that are in contact with the wafer 7 so as to be in contact with the wafer 7. For the insulating member 8a, for example, a silicone resin having insulating properties and appropriate hardness can be used. The insulating member 8 a of the semiconductor wafer measuring apparatus 100 is spaced apart from the pair of probes 6 a and 6 b and is interposed so as to partition the pair of probes 6 a and 6 b, and is fixed to the base 3 constituting the probe card 11. Yes.

  The semiconductor wafer measuring apparatus 100 shown in FIG. 1 has a small tip interval w between the probes 6a and 6b shown in FIG. 1B when a high voltage is applied to the pair of probes 6a and 6b or even when the applied voltage is low. When a large electric field strength is generated, the electric field strength can be reduced by the insulating member 8a interposed between the tips of the probes. In particular, since the insulating member 8a is interposed so as to be in contact with the wafer 7, it is possible to effectively suppress the interfacial discharge on the wafer 7 where dielectric breakdown is most likely to occur. Therefore, even when a high voltage is applied, the dielectric breakdown due to the discharge between the probes 6a and 6b can be prevented and the measurement reliability can be improved.

  As described above, the semiconductor wafer measuring apparatus 100 shown in FIG. 1 applies a voltage by bringing the pair of probes 6 a and 6 b into contact with the semiconductor wafer 7 and tests the semiconductor device formed on the wafer 7. This is a wafer measuring apparatus that is unlikely to cause dielectric breakdown even when a high voltage is applied. For example, a semiconductor wafer measuring apparatus capable of performing a highly reliable test even for a high breakdown voltage semiconductor device.

  In order to make the drawing easier to see, only a pair of probes 6a and 6b is shown in FIG. 1, but a plurality of pairs of probes may be mounted on the probe card 11. By interposing an insulating member for each pair of probes as in the case of the probes 6a and 6b, high voltage measurement is possible for each pair of probes.

  As described above, by preparing a probe card on which a plurality of pairs of probes matched to the electrode pads of the semiconductor device formed on the wafer 7 is prepared, the test of the semiconductor device can be easily performed with a high voltage applied. Can be implemented. Note that the number of probe pairs mounted on the probe card may be one chip unit or a plurality of chip units of the semiconductor device.

  Further, in the semiconductor wafer measuring apparatus 100 of FIG. 1, the insulating member 8a is spaced apart from the pair of probes 6a and 6b and interposed so as to partition the pair of probes 6a and 6b. According to this, high voltage measurement is possible, and unlike the semiconductor wafer measurement apparatus described later, the tips of the probes 6a and 6b are easy to visually recognize, so that the electrode pads of the semiconductor device formed on the wafer 7 are applied to the electrode pads. The probes 6a and 6b can be easily contacted.

  FIG. 2 is an example of another semiconductor wafer measuring apparatus, and is a cross-sectional view showing the surroundings of the probes 6a and 6b in the semiconductor wafer measuring apparatus 101 in an enlarged manner.

  In the semiconductor wafer measuring apparatus 101 of FIG. 2, unlike the semiconductor wafer measuring apparatus 100 shown in FIG. It comprises a second insulating portion 8b2 that partitions the vicinity of the tips of the probes 6a, 6b. In the insulating member 8b, the hardness of the second insulating portion 8b2 is set lower than the hardness of the first insulating portion 8b1. In this way, by setting the hardness of the second insulating portion 8b2 in contact with the wafer 7 appropriately low, occurrence of contact damage to the wafer 7 by the insulating member 8b can be suppressed.

FIGS. 3A and 3B are examples of a semiconductor wafer measuring apparatus which is not the present invention but serves as a reference . FIGS. 3A and 3B are enlarged cross-sectional views around the probes 6a and 6b in the semiconductor wafer measuring apparatuses 102 and 103, respectively. FIG.

  In the semiconductor wafer measuring apparatus 102 of FIG. 3A, an insulating member 8c is interposed so as to cover the vicinity of the tip of one probe 6a of the pair of probes 6a and 6b. In the semiconductor wafer measuring apparatus 103 in FIG. 3B, insulating members 8c and 8d are interposed so as to cover the vicinity of the tips of both probes 6a and 6b in the pair of probes 6a and 6b.

  Thus, by interposing the insulating member so as to cover the vicinity of at least one tip of the pair of probes 6a and 6b, insulation breakdown due to the discharge between the probes 6a and 6b can be prevented, and measurement reliability can be improved. be able to. In this case, it is preferable for the prevention of discharge that the insulating members 8c and 8d are interposed between the pair of probes 6a and 6b as in the semiconductor wafer measuring apparatus 103 of FIG.

FIGS. 4A and 4B are schematic perspective views of semiconductor wafer measuring apparatuses 104 and 105, respectively, which are examples of another reference semiconductor wafer measuring apparatus.

  In the semiconductor wafer measuring apparatus 104 in FIG. 4A, an insulating member 8e fixed to the base 3 of the probe card 12 is interposed so as to cover between both ends of the pair of probes 6a and 6b. 4B, an insulating member 8f fixed to the base 3 of the probe card 13 is interposed so as to cover the wafer 7. In the semiconductor wafer measuring apparatus 105 in FIG. For preventing discharge, the semiconductor wafer measuring device 104 of FIG. 4A is more preferable than the semiconductor wafer measuring device 103 of FIG. 3B, and the semiconductor wafer measuring device 105 of FIG. Further preferred.

  Needless to say, a plurality of pairs of probes may be mounted on the probe card in the semiconductor wafer measuring apparatuses 101 to 105 illustrated in FIGS.

FIG. 5 is an example of another semiconductor wafer measuring apparatus according to the present invention, and is a cross-sectional view showing the surroundings of the probes 6c and 6d in the semiconductor wafer measuring apparatus 106 in an enlarged manner.

  Unlike the semiconductor wafer measuring apparatus 100 shown in FIG. 1, the semiconductor wafer measuring apparatus 106 shown in FIG. 5 has a tip interval between the pair of probes 6c, 6d with respect to a gap w2 near the tip of the pair of probes 6c, 6d. w1 has a widely set structure. Thereby, compared with the semiconductor wafer measuring apparatus 100 of FIG. 1, discharge can be made more difficult to occur.

  In the semiconductor wafer measuring apparatuses 100 to 106 described above, the pair of probes 6a, 6b and 6c, 6d is structured to be disposed in a vacuum or in an inert atmosphere, thereby further preventing discharge. Can do.

  As described above, each of the semiconductor wafer measuring apparatuses 100 to 106 illustrated in FIGS. 1 to 5 applies a voltage by bringing the pair of probes 6a, 6b and 6c, 6d into contact with the semiconductor wafer 7, A semiconductor wafer measuring apparatus for testing a semiconductor device formed on a wafer 7, which is less likely to cause dielectric breakdown even when a high voltage is applied, and capable of performing a highly reliable test on a high breakdown voltage semiconductor device It is a measuring device.

  Therefore, the semiconductor wafer measuring apparatuses 100 to 106 are suitable for applying a voltage of 1000 V or more to the pair of probes 6a, 6b and 6c, 6d, which cannot be handled by the conventional semiconductor wafer measuring apparatus.

1A is a schematic perspective view of a semiconductor wafer measuring apparatus 100, and FIG. 1B is a view around probes 6a and 6b in the semiconductor wafer measuring apparatus 100. FIG. It is sectional drawing which expanded and showed. FIG. 10 is an enlarged cross-sectional view of the vicinity of probes 6a and 6b in the semiconductor wafer measuring apparatus 101 as another example of the semiconductor wafer measuring apparatus. (A), (b) is an example of a semiconductor wafer measuring apparatus that is not a reference of the present invention but is a reference, and is a cross-sectional view enlarging and surrounding the probes 6a, 6b in the semiconductor wafer measuring apparatuses 102, 103, respectively. is there. (A), (b) is the example of another semiconductor wafer measuring device used as a reference, and is a typical perspective view of semiconductor wafer measuring devices 104 and 105, respectively. FIG. 6 is an enlarged cross-sectional view of the vicinity of probes 6c and 6d in the semiconductor wafer measuring apparatus 106 as another semiconductor wafer measuring apparatus according to the present invention . It is the figure which showed the structural example of the conventional typical probe card.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100-106 Semiconductor wafer measuring device 1,11-13 Probe card 2 Opening part 3 Base 6,6a-6d Probe (needle)
7 Wafer 8a-8f Insulating member

Claims (7)

A semiconductor wafer measuring apparatus for testing a semiconductor device formed on a wafer by applying a voltage by bringing a pair of probes into contact with the semiconductor wafer,
Between the tip of the pair of probes in contact with the wafer, separated from the said pair of probes, a semiconductor wafer measurement, characterized in that the insulating member that partitions the pair of probes, is interposed so as to contact with the wafer apparatus. The insulating member comprises a first insulating part that partitions the vicinity of the tip ends of the pair of probes, and a second insulating part that partitions the vicinity of the tip ends of the pair of probes,
2. The semiconductor wafer measuring apparatus according to claim 1, wherein the hardness of the second insulating portion is set lower than the hardness of the first insulating portion . 3. The semiconductor wafer measuring apparatus according to claim 1 , wherein the distance between the tips of the pair of probes is set wider than the distance near the tips of the pair of probes . 4. The pair of probes, a semiconductor wafer measuring device according to any one of claims 1 to 3, characterized by being arranged in a vacuum or in an inert atmosphere. It said insulating member is a semiconductor wafer measuring device according to any one of claims 1 to 4, characterized in that it consists of a silicone resin. The pair of probes are arranged on a removable base,
Said insulating member is a semiconductor wafer measuring device according to any one of claims 1 to 5, characterized in that fixed to said base. Wherein the pair of probes, a semiconductor wafer measuring device according to any one of claims 1 to 6, wherein applying a voltage greater than 1000V.

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