JP5064867B2 - 同時スイッチングノイズを低減するプリアンブルを含むｄｃバランスエンコーディングされたデータのための送受信方法及びシステム - Google Patents

同時スイッチングノイズを低減するプリアンブルを含むｄｃバランスエンコーディングされたデータのための送受信方法及びシステム Download PDF

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JP5064867B2
JP5064867B2 JP2007098641A JP2007098641A JP5064867B2 JP 5064867 B2 JP5064867 B2 JP 5064867B2 JP 2007098641 A JP2007098641 A JP 2007098641A JP 2007098641 A JP2007098641 A JP 2007098641A JP 5064867 B2 JP5064867 B2 JP 5064867B2
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JP2007282235A5 (enExample
JP2007282235A (ja
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升浚 ▲ぺ▼
星珍 張
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Samsung Electronics Co Ltd
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M5/00—Conversion of the form of the representation of individual digits
    • H03M5/02—Conversion to or from representation by pulses
    • H03M5/04—Conversion to or from representation by pulses the pulses having two levels
    • H03M5/14—Code representation, e.g. transition, for a given bit cell depending on the information in one or more adjacent bit cells, e.g. delay modulation code, double density code
    • H03M5/145—Conversion to or from block codes or representations thereof

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dram (AREA)
JP2007098641A 2006-04-04 2007-04-04 同時スイッチングノイズを低減するプリアンブルを含むｄｃバランスエンコーディングされたデータのための送受信方法及びシステム Active JP5064867B2 (ja)

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KR1020060030752A KR100885869B1 (ko) 2006-04-04 2006-04-04 프리엠블 코드를 사용하여 노이즈를 감소시키는 단일형병렬데이터 인터페이스 방법, 기록매체 및 반도체 장치
KR10-2006-0030752 2006-04-04

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JP2010086115A Division JP2010172002A (ja) 2006-04-04 2010-04-02 同時スイッチングノイズを低減するプリアンブルを含むｄｃバランスエンコーディングされたデータのための送受信方法及びシステム

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JP2007282235A JP2007282235A (ja) 2007-10-25
JP2007282235A5 JP2007282235A5 (enExample) 2010-05-20
JP5064867B2 true JP5064867B2 (ja) 2012-10-31

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JP2007098641A Active JP5064867B2 (ja) 2006-04-04 2007-04-04 同時スイッチングノイズを低減するプリアンブルを含むｄｃバランスエンコーディングされたデータのための送受信方法及びシステム
JP2010086115A Pending JP2010172002A (ja) 2006-04-04 2010-04-02 同時スイッチングノイズを低減するプリアンブルを含むｄｃバランスエンコーディングされたデータのための送受信方法及びシステム

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JP2010086115A Pending JP2010172002A (ja) 2006-04-04 2010-04-02 同時スイッチングノイズを低減するプリアンブルを含むｄｃバランスエンコーディングされたデータのための送受信方法及びシステム

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US (4) US7492288B2 (enExample)
JP (2) JP5064867B2 (enExample)
KR (1) KR100885869B1 (enExample)
DE (1) DE102007016461B4 (enExample)
TW (1) TW200810372A (enExample)

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JP2006517767A (ja) * 2003-01-29 2006-07-27 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ 一定全電流を用いるデータ通信
KR100885869B1 (ko) * 2006-04-04 2009-02-27 삼성전자주식회사 프리엠블 코드를 사용하여 노이즈를 감소시키는 단일형병렬데이터 인터페이스 방법, 기록매체 및 반도체 장치
US7936289B2 (en) * 2006-04-04 2011-05-03 Samsung Electronics Co., Ltd. Method, device, and system for data communication with preamble for reduced switching noise
JP5030698B2 (ja) * 2007-07-24 2012-09-19 株式会社リコー 半導体装置及びノイズ低減方法
JP5465376B2 (ja) * 2007-10-18 2014-04-09 ピーエスフォー ルクスコ エスエイアールエル 半導体装置、およびドライバ制御方法
JP5365132B2 (ja) * 2008-10-17 2013-12-11 富士ゼロックス株式会社 直列信号の受信装置、直列伝送システム、直列伝送方法、直列信号の送信装置
KR101653205B1 (ko) * 2010-04-01 2016-09-01 삼성전자주식회사 멀티 프리앰블 프레임 구조를 이용한 데이터 전송 시스템
US9300434B2 (en) 2011-06-10 2016-03-29 Mayo Foundation For Medical Education And Research Zero sum signaling in a digital system environment
KR101960242B1 (ko) * 2012-09-18 2019-03-20 삼성전자주식회사 신체 영역 네트워크 또는 저전력 네트워크에서 직류 발란싱을 수행하는 최소 에너지 코딩 방법 및 장치
US10396840B2 (en) * 2013-12-27 2019-08-27 Intel Corporation High speed short reach input/output (I/O)
KR102509941B1 (ko) * 2016-10-06 2023-03-13 에스케이하이닉스 주식회사 송신 장치 및 이를 포함하는 시스템
JP2021044046A (ja) * 2019-09-13 2021-03-18 キオクシア株式会社 メモリシステム、半導体集積回路、及びブリッジ通信システム
GB2593691B (en) 2020-03-30 2022-08-24 Imagination Tech Ltd Efficient encoding methods
US11756592B2 (en) * 2020-09-29 2023-09-12 Samsung Electronics Co., Ltd. Memory device supporting DBI interface and operating method of memory device

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US4486739A (en) * 1982-06-30 1984-12-04 International Business Machines Corporation Byte oriented DC balanced (0,4) 8B/10B partitioned block transmission code
CA1244110A (en) * 1984-12-27 1988-11-01 Masashi Hirome Transmitting data processing system
US5185717A (en) * 1988-08-05 1993-02-09 Ryoichi Mori Tamper resistant module having logical elements arranged in multiple layers on the outer surface of a substrate to protect stored information
US5387911A (en) * 1992-02-21 1995-02-07 Gleichert; Marc C. Method and apparatus for transmitting and receiving both 8B/10B code and 10B/12B code in a switchable 8B/10B transmitter and receiver
US5533034A (en) * 1992-06-26 1996-07-02 Matsushita Electric Industrial Co., Ltd. High speed data transfer device having improved efficiency
US5508967A (en) * 1993-08-09 1996-04-16 Matsushita Electric Industrial Co., Ltd. Line memory
JPH0965464A (ja) * 1995-08-22 1997-03-07 Matsushita Electric Ind Co Ltd 無線通信装置
US5825824A (en) * 1995-10-05 1998-10-20 Silicon Image, Inc. DC-balanced and transition-controlled encoding method and apparatus
JP2000311028A (ja) 1999-04-28 2000-11-07 Hitachi Ltd 位相制御回路、半導体装置及び半導体メモリ
JP4282170B2 (ja) * 1999-07-29 2009-06-17 株式会社ルネサステクノロジ 半導体装置
JP3522597B2 (ja) * 1999-08-02 2004-04-26 松下電器産業株式会社 Ｉｃカード接続装置
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KR100626375B1 (ko) 2003-07-21 2006-09-20 삼성전자주식회사 고주파로 동작하는 반도체 메모리 장치 및 모듈
KR100667594B1 (ko) * 2004-10-19 2007-01-11 삼성전자주식회사 프리엠퍼시스 출력버퍼와, 반도체 메모리 장치 및 데이터출력구동방법.
JP4620504B2 (ja) * 2005-03-10 2011-01-26 富士通セミコンダクター株式会社 半導体メモリおよびシステム装置
KR100885869B1 (ko) * 2006-04-04 2009-02-27 삼성전자주식회사 프리엠블 코드를 사용하여 노이즈를 감소시키는 단일형병렬데이터 인터페이스 방법, 기록매체 및 반도체 장치

Also Published As

Publication number Publication date
US7768429B2 (en) 2010-08-03
KR20070099374A (ko) 2007-10-09
US20100259426A1 (en) 2010-10-14
US20110249513A1 (en) 2011-10-13
TW200810372A (en) 2008-02-16
US7492288B2 (en) 2009-02-17
US20070229320A1 (en) 2007-10-04
DE102007016461B4 (de) 2012-03-08
US20090146850A1 (en) 2009-06-11
KR100885869B1 (ko) 2009-02-27
US7961121B2 (en) 2011-06-14
DE102007016461A1 (de) 2007-11-29
JP2007282235A (ja) 2007-10-25
JP2010172002A (ja) 2010-08-05

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