JP5038147B2 - 発光体、及び前記発光体を製造する方法 - Google Patents
発光体、及び前記発光体を製造する方法 Download PDFInfo
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- JP5038147B2 JP5038147B2 JP2007542396A JP2007542396A JP5038147B2 JP 5038147 B2 JP5038147 B2 JP 5038147B2 JP 2007542396 A JP2007542396 A JP 2007542396A JP 2007542396 A JP2007542396 A JP 2007542396A JP 5038147 B2 JP5038147 B2 JP 5038147B2
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- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 239000000758 substrate Substances 0.000 claims abstract description 42
- 238000000034 method Methods 0.000 claims description 12
- 239000004020 conductor Substances 0.000 claims 2
- IBBMAWULFFBRKK-UHFFFAOYSA-N picolinamide Chemical compound NC(=O)C1=CC=CC=N1 IBBMAWULFFBRKK-UHFFFAOYSA-N 0.000 claims 2
- 229910052782 aluminium Inorganic materials 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 238000010521 absorption reaction Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 230000017525 heat dissipation Effects 0.000 description 1
- 230000031700 light absorption Effects 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
- Optical Elements Other Than Lenses (AREA)
- Laminated Bodies (AREA)
Description
まず(図3a)、例えば、シリコン(Si)から作られている基板12が設けられる。
次いで(図3b)、基板12の上側に誘電層14が設けられる。
次いで(図3c)、構造化されている伝導層16が、誘電層14上に堆積される。前記のような層16は、好ましくはCuを含んでおり、当該発光体の伝導トラックを構成する。しかしながら、何らかの他の互換性のある(compatible)低い抵抗の金属のトラックが、代替的に使用されることもできることに留意されたい。
次いで(図3d)、絶縁層20が設けられ、該絶縁層20は、基板12の誘電層14と、構造化されている伝導層16とを覆う。更に、コンタクトホール22はが、実装されるべき(複数の)LEDチップと伝導層16の前記のようなトラックとの間の接続を可能にするように、絶縁層20内に設けられる。コンタクトホール22の大きさ及び形は、前記実装されるべきLEDチップの特性に依存する。
次いで(図3e)、反射層24が、絶縁層20上に堆積される。反射層24は、好ましくは、Al又はAgを有している。反射層24の一部は、1つ以上のLEDチップを収容するために、エッチングされて取り除かれる。
最後に(図3f)、LEDチップ(この場合、フリップチップ18)が、該LEDチップが伝導トラック16と接続している状態であるように実装される。
Claims (6)
- − 基板と、
− 前記基板の一方の面に設けられている複数の別個の伝導トラックに構造化されている伝導層と、
− 前記基板及び伝導層を覆う絶縁層と、
− 前記構造化されている伝導層に接続されている少なくとも1つの光源と、
を有する発光体であって、
前記絶縁層上に設けられた構造化されていない反射層を更に有し、前記反射層は、前記光源又は前記光源に関連する伝導体によって占有されていない前記基板の全表面を覆っていると共に、前記少なくとも1つの光源の少なくとも周囲に本質的に連続的な拡張部を有していることを特徴とする、発光体。 - 前記絶縁層は、前記光源と前記伝導層との間の接続を可能にするコンタクトホールを有する、請求項1に記載の発光体。
- 前記光源は、フリップチップ光源及びワイヤ・ボンディングされた光源の一方である、請求項1又は2に記載の発光体。
- 前記光源は発光ダイオードである、請求項1ないし3の何れか一項に記載の発光体。
- − 基板を設けるステップと、
− 前記基板の一方の面に複数の別個の伝導トラックに構造化されている伝導層を設けるステップと、
− 前記基板及び伝導層を覆う絶縁層を設けるステップと、
− 前記伝導層と接続している少なくとも1つの光源を位置させるステップと、
を有する発光体を製造する方法であって、
− 前記絶縁層上に構造化されていない反射層を設けるステップであって、前記反射層は、前記光源又は前記光源に関連する伝導体によって占有されていない前記基板の全表面を覆っていると共に、前記少なくとも1つの光源の少なくとも周囲に本質的に連続的な拡張部を有している、ステップ、
を更に有することを特徴とする方法。 - 前記光源と前記伝導層との間の接続を可能にするコンタクトホールを前記絶縁層内に設けるステップを更に有する、請求項5に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP04105892 | 2004-11-18 | ||
EP04105892.6 | 2004-11-18 | ||
PCT/IB2005/053742 WO2006054228A2 (en) | 2004-11-18 | 2005-11-14 | Illuminator and method for producing such illuminator |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008521236A JP2008521236A (ja) | 2008-06-19 |
JP5038147B2 true JP5038147B2 (ja) | 2012-10-03 |
Family
ID=35695734
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007542396A Active JP5038147B2 (ja) | 2004-11-18 | 2005-11-14 | 発光体、及び前記発光体を製造する方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US8541797B2 (ja) |
EP (1) | EP1815535B1 (ja) |
JP (1) | JP5038147B2 (ja) |
KR (1) | KR101187746B1 (ja) |
CN (1) | CN101061590B (ja) |
AT (1) | ATE541320T1 (ja) |
TW (1) | TW200624716A (ja) |
WO (1) | WO2006054228A2 (ja) |
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-
2005
- 2005-11-14 AT AT05805752T patent/ATE541320T1/de active
- 2005-11-14 US US11/719,240 patent/US8541797B2/en active Active
- 2005-11-14 WO PCT/IB2005/053742 patent/WO2006054228A2/en active Application Filing
- 2005-11-14 KR KR1020077013555A patent/KR101187746B1/ko active IP Right Grant
- 2005-11-14 CN CN2005800395819A patent/CN101061590B/zh active Active
- 2005-11-14 JP JP2007542396A patent/JP5038147B2/ja active Active
- 2005-11-14 EP EP05805752A patent/EP1815535B1/en active Active
- 2005-11-15 TW TW094140141A patent/TW200624716A/zh unknown
Also Published As
Publication number | Publication date |
---|---|
CN101061590A (zh) | 2007-10-24 |
US20090078948A1 (en) | 2009-03-26 |
JP2008521236A (ja) | 2008-06-19 |
TW200624716A (en) | 2006-07-16 |
WO2006054228A3 (en) | 2006-08-03 |
KR101187746B1 (ko) | 2012-10-05 |
EP1815535B1 (en) | 2012-01-11 |
EP1815535A2 (en) | 2007-08-08 |
KR20070089167A (ko) | 2007-08-30 |
US8541797B2 (en) | 2013-09-24 |
CN101061590B (zh) | 2010-05-12 |
WO2006054228A2 (en) | 2006-05-26 |
ATE541320T1 (de) | 2012-01-15 |
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