JP4959931B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4959931B2 JP4959931B2 JP2004285023A JP2004285023A JP4959931B2 JP 4959931 B2 JP4959931 B2 JP 4959931B2 JP 2004285023 A JP2004285023 A JP 2004285023A JP 2004285023 A JP2004285023 A JP 2004285023A JP 4959931 B2 JP4959931 B2 JP 4959931B2
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- oxide film
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- 238000004519 manufacturing process Methods 0.000 title claims description 45
- 239000004065 semiconductor Substances 0.000 title claims description 40
- 238000009792 diffusion process Methods 0.000 claims description 76
- 238000000034 method Methods 0.000 claims description 23
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 20
- 239000012535 impurity Substances 0.000 claims description 20
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 20
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 18
- 229910052710 silicon Inorganic materials 0.000 claims description 18
- 239000010703 silicon Substances 0.000 claims description 18
- 238000000151 deposition Methods 0.000 claims description 5
- 239000012528 membrane Substances 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 25
- 229920005591 polysilicon Polymers 0.000 description 25
- 238000000926 separation method Methods 0.000 description 24
- 230000015556 catabolic process Effects 0.000 description 21
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 18
- 229910052814 silicon oxide Inorganic materials 0.000 description 18
- 239000000758 substrate Substances 0.000 description 17
- 238000000206 photolithography Methods 0.000 description 9
- 241000293849 Cordylanthus Species 0.000 description 7
- 230000015572 biosynthetic process Effects 0.000 description 6
- 229920002120 photoresistant polymer Polymers 0.000 description 6
- WNUPENMBHHEARK-UHFFFAOYSA-N silicon tungsten Chemical compound [Si].[W] WNUPENMBHHEARK-UHFFFAOYSA-N 0.000 description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 4
- 229910052796 boron Inorganic materials 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000002955 isolation Methods 0.000 description 4
- 229910052698 phosphorus Inorganic materials 0.000 description 4
- 239000011574 phosphorus Substances 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 238000005468 ion implantation Methods 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- 229910016570 AlCu Inorganic materials 0.000 description 2
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- -1 for example Substances 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 230000001133 acceleration Effects 0.000 description 1
- WPPDFTBPZNZZRP-UHFFFAOYSA-N aluminum copper Chemical compound [Al].[Cu] WPPDFTBPZNZZRP-UHFFFAOYSA-N 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- SLLGVCUQYRMELA-UHFFFAOYSA-N chlorosilicon Chemical compound Cl[Si] SLLGVCUQYRMELA-UHFFFAOYSA-N 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 238000000605 extraction Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000005360 phosphosilicate glass Substances 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7816—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
- H01L29/0878—Impurity concentration or distribution
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76213—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO introducing electrical inactive or active impurities in the local oxidation region, e.g. to alter LOCOS oxide growth characteristics or for additional isolation purpose
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823481—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/0843—Source or drain regions of field-effect devices
- H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
- H01L29/0852—Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
- H01L29/0873—Drain regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66681—Lateral DMOS transistors, i.e. LDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42364—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity
- H01L29/42368—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the insulating layer, e.g. thickness or uniformity the thickness being non-uniform
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
- H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
- H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
Description
2 N型の埋込拡散層
4 N型のエピタキシャル層
8 シリコン酸化膜
9 ポリシリコン膜
10 シリコン窒化膜
11 N型の拡散層
12 フォトレジスト
13 開口部
15 ポリシリコン膜
16 タングステンシリコン膜
17 シリコン酸化膜
18 ゲート電極
21 P型の拡散層
Claims (3)
- 半導体層表面にゲート酸化膜、第1のシリコン膜及びシリコン窒化膜を、順次、堆積した絶縁層を形成し、該半導体層にフィールド酸化膜が形成される領域に第1の開口部が設けられるように、前記絶縁層を選択的に除去する工程と、
前記半導体層表面にレジストを堆積した後、前記絶縁層の段差を位置合わせマークとして用いて前記レジストを選択的に除去し、前記第1の開口部の一部が露出するように前記レジストに第2の開口部を形成し、前記レジストの第2の開口部をマスクとして前記半導体層に不純物を注入し、ドレイン拡散層を形成する工程と、
前記絶縁層の第1の開口部を用いて、前記半導体層に少なくともその一部が前記ドレイン拡散層上に位置するように前記半導体層にフィールド酸化膜を形成し、前記絶縁層の前記シリコン窒化膜を除去し、前記第1のシリコン膜上面に第2のシリコン膜を堆積した後、前記第1及び第2のシリコン膜を選択的に除去することで、前記フィールド酸化膜上方に少なくともその一端側が配置されるようにゲート電極を形成する工程と、
前記ゲート電極の他端側下方に一部が配置されるようにバックゲート拡散層を形成し、該バックゲート拡散層表面からソース拡散層を形成する工程とを有することを特徴とする半導体装置の製造方法。 - 前記バックゲート拡散層を形成する工程では、前記ゲート電極の他端を用い、自己整合技術により形成することを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記ゲート電極を形成する工程では、前記フィールド酸化膜の段差を位置合わせマークとして用いることを特徴とする請求項1または請求項2に記載の半導体装置の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004285023A JP4959931B2 (ja) | 2004-09-29 | 2004-09-29 | 半導体装置の製造方法 |
TW094131061A TWI278036B (en) | 2004-09-29 | 2005-09-09 | Method for making a semiconductor device |
KR1020050085538A KR100668542B1 (ko) | 2004-09-29 | 2005-09-14 | 반도체 장치의 제조 방법 |
US11/233,637 US7534665B2 (en) | 2004-09-29 | 2005-09-23 | Method of manufacturing semiconductor device |
CNB2005101076371A CN100468658C (zh) | 2004-09-29 | 2005-09-29 | 半导体装置的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004285023A JP4959931B2 (ja) | 2004-09-29 | 2004-09-29 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006100578A JP2006100578A (ja) | 2006-04-13 |
JP4959931B2 true JP4959931B2 (ja) | 2012-06-27 |
Family
ID=36099757
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004285023A Expired - Fee Related JP4959931B2 (ja) | 2004-09-29 | 2004-09-29 | 半導体装置の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7534665B2 (ja) |
JP (1) | JP4959931B2 (ja) |
KR (1) | KR100668542B1 (ja) |
CN (1) | CN100468658C (ja) |
TW (1) | TWI278036B (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5525736B2 (ja) * | 2009-02-18 | 2014-06-18 | セミコンダクター・コンポーネンツ・インダストリーズ・リミテッド・ライアビリティ・カンパニー | 半導体装置及びその製造方法 |
TWI700810B (zh) | 2009-08-07 | 2020-08-01 | 日商半導體能源研究所股份有限公司 | 半導體裝置和其製造方法 |
US8304830B2 (en) * | 2010-06-10 | 2012-11-06 | Macronix International Co., Ltd. | LDPMOS structure for enhancing breakdown voltage and specific on resistance in biCMOS-DMOS process |
CN102456578B (zh) * | 2010-11-03 | 2013-09-04 | 凹凸电子(武汉)有限公司 | 高压晶体管及其制造方法 |
US8629026B2 (en) * | 2010-11-12 | 2014-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Source tip optimization for high voltage transistor devices |
US8962397B2 (en) * | 2011-07-25 | 2015-02-24 | Microchip Technology Incorporated | Multiple well drain engineering for HV MOS devices |
US10529812B1 (en) * | 2018-10-10 | 2020-01-07 | Texas Instruments Incorporated | Locos with sidewall spacer for transistors and other devices |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
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US5055896A (en) * | 1988-12-15 | 1991-10-08 | Siliconix Incorporated | Self-aligned LDD lateral DMOS transistor with high-voltage interconnect capability |
JPH05267336A (ja) * | 1992-03-18 | 1993-10-15 | Toshiba Corp | 位置合わせマークを用いた配線層の形成方法 |
US5242841A (en) * | 1992-03-25 | 1993-09-07 | Texas Instruments Incorporated | Method of making LDMOS transistor with self-aligned source/backgate and photo-aligned gate |
US5322804A (en) * | 1992-05-12 | 1994-06-21 | Harris Corporation | Integration of high voltage lateral MOS devices in low voltage CMOS architecture using CMOS-compatible process steps |
US5559044A (en) * | 1992-09-21 | 1996-09-24 | Siliconix Incorporated | BiCDMOS process technology |
US5498554A (en) * | 1994-04-08 | 1996-03-12 | Texas Instruments Incorporated | Method of making extended drain resurf lateral DMOS devices |
US5548147A (en) * | 1994-04-08 | 1996-08-20 | Texas Instruments Incorporated | Extended drain resurf lateral DMOS devices |
US5512495A (en) * | 1994-04-08 | 1996-04-30 | Texas Instruments Incorporated | Method of manufacturing extended drain resurf lateral DMOS devices |
KR100267395B1 (ko) * | 1997-12-19 | 2000-10-16 | 김덕중 | 이중-확산 모스 트랜지스터 및 그 제조방법 |
JP3762136B2 (ja) * | 1998-04-24 | 2006-04-05 | 株式会社東芝 | 半導体装置 |
JP3191285B2 (ja) * | 1998-06-25 | 2001-07-23 | 日本電気株式会社 | 半導体装置及びその製造方法 |
US6531355B2 (en) * | 1999-01-25 | 2003-03-11 | Texas Instruments Incorporated | LDMOS device with self-aligned RESURF region and method of fabrication |
JP2003168687A (ja) * | 2001-11-30 | 2003-06-13 | Nec Electronics Corp | 目合わせパターンおよびその製造方法 |
JP2003257814A (ja) * | 2002-02-28 | 2003-09-12 | Mitsubishi Electric Corp | 半導体装置のアライメントマーク形成方法 |
JP4166031B2 (ja) * | 2002-04-17 | 2008-10-15 | 三洋電機株式会社 | Mos半導体装置およびその製造方法 |
KR100867574B1 (ko) * | 2002-05-09 | 2008-11-10 | 페어차일드코리아반도체 주식회사 | 고전압 디바이스 및 그 제조방법 |
-
2004
- 2004-09-29 JP JP2004285023A patent/JP4959931B2/ja not_active Expired - Fee Related
-
2005
- 2005-09-09 TW TW094131061A patent/TWI278036B/zh not_active IP Right Cessation
- 2005-09-14 KR KR1020050085538A patent/KR100668542B1/ko not_active IP Right Cessation
- 2005-09-23 US US11/233,637 patent/US7534665B2/en active Active
- 2005-09-29 CN CNB2005101076371A patent/CN100468658C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
TW200629409A (en) | 2006-08-16 |
CN1767160A (zh) | 2006-05-03 |
CN100468658C (zh) | 2009-03-11 |
US7534665B2 (en) | 2009-05-19 |
KR20060051276A (ko) | 2006-05-19 |
KR100668542B1 (ko) | 2007-01-16 |
JP2006100578A (ja) | 2006-04-13 |
US20060068552A1 (en) | 2006-03-30 |
TWI278036B (en) | 2007-04-01 |
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