JP4948452B2 - 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法 - Google Patents

表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法 Download PDF

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Publication number
JP4948452B2
JP4948452B2 JP2008059852A JP2008059852A JP4948452B2 JP 4948452 B2 JP4948452 B2 JP 4948452B2 JP 2008059852 A JP2008059852 A JP 2008059852A JP 2008059852 A JP2008059852 A JP 2008059852A JP 4948452 B2 JP4948452 B2 JP 4948452B2
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JP
Japan
Prior art keywords
pressing
surface mount
top plate
mounting
mount device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2008059852A
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English (en)
Japanese (ja)
Other versions
JP2009218358A5 (enExample
JP2009218358A (ja
Inventor
誠治 時井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Corp
Panasonic Holdings Corp
Original Assignee
Panasonic Corp
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Panasonic Corp, Matsushita Electric Industrial Co Ltd filed Critical Panasonic Corp
Priority to JP2008059852A priority Critical patent/JP4948452B2/ja
Priority to US12/401,297 priority patent/US20090227136A1/en
Publication of JP2009218358A publication Critical patent/JP2009218358A/ja
Publication of JP2009218358A5 publication Critical patent/JP2009218358A5/ja
Application granted granted Critical
Publication of JP4948452B2 publication Critical patent/JP4948452B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/301—Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10371—Shields or metal cases
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10393—Clamping a component by an element or a set of elements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
    • Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP2008059852A 2008-03-10 2008-03-10 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法 Expired - Fee Related JP4948452B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008059852A JP4948452B2 (ja) 2008-03-10 2008-03-10 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法
US12/401,297 US20090227136A1 (en) 2008-03-10 2009-03-10 Mounting structure for surface mounted device and method of firmly mounting surface mounted device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008059852A JP4948452B2 (ja) 2008-03-10 2008-03-10 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法

Publications (3)

Publication Number Publication Date
JP2009218358A JP2009218358A (ja) 2009-09-24
JP2009218358A5 JP2009218358A5 (enExample) 2011-01-27
JP4948452B2 true JP4948452B2 (ja) 2012-06-06

Family

ID=41054081

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008059852A Expired - Fee Related JP4948452B2 (ja) 2008-03-10 2008-03-10 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法

Country Status (2)

Country Link
US (1) US20090227136A1 (enExample)
JP (1) JP4948452B2 (enExample)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5173029B2 (ja) * 2009-09-17 2013-03-27 株式会社東芝 電子機器
KR102540241B1 (ko) * 2018-02-21 2023-06-08 삼성전자주식회사 자성체로부터 발생하는 자기력의 적어도 일부를 차폐하기 위한 차폐 부재 및 차폐 부재와 연결된 비자성체 속성을 갖는 연결부를 포함하는 전자 장치
EP4117407A1 (en) 2018-02-21 2023-01-11 Samsung Electronics Co., Ltd. Electronic device including shield member for shielding at least part of magnetic force generated by magnetic substance and connection portion including property of nonmagnetic substance connected to shield member
CN111246666B (zh) * 2020-03-11 2021-03-26 乐清市日精电气有限公司 一种光电ic输出光学开关
US12249589B2 (en) * 2022-06-06 2025-03-11 Nvidia Corporation Apparatus and method for BGA coplanarity and warpage control

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5724775U (enExample) * 1980-07-17 1982-02-08
JPS59145595A (ja) * 1983-02-09 1984-08-21 松下電器産業株式会社 電子部品の保持装置
JPS6451288A (en) * 1987-08-24 1989-02-27 Fanuc Ltd Calibrating apparatus for industrial robot
US4878846A (en) * 1988-04-06 1989-11-07 Schroeder Jon M Electronic circuit chip connection assembly and method
EP0431707A3 (en) * 1989-12-08 1991-10-02 Shell Internationale Research Maatschappij B.V. Heterocyclic compounds
CA2072377A1 (en) * 1991-07-12 1993-01-13 Masanori Nishiguchi Semiconductor chip module and method of manufacturing the same
US5502397A (en) * 1992-11-12 1996-03-26 Advanced Micro Devices, Inc. Integrated circuit testing apparatus and method
US5984293A (en) * 1997-06-25 1999-11-16 Mcms, Inc. Apparatus for holding printed circuit board assemblies in manufacturing processes
JPH11163494A (ja) * 1997-11-28 1999-06-18 Toshiba Corp 表面実装デバイスの実装方法、ｂｇａパッケージの実装構造、及び電子機器
US6071756A (en) * 1998-08-20 2000-06-06 Lockheed Martin Corporation Method for holding components in place during soldering
US6726195B1 (en) * 1998-10-13 2004-04-27 Dek International Gmbh Method for ensuring planarity when using a flexible, self conforming, workpiece support system
US6255730B1 (en) * 1999-04-30 2001-07-03 Agilent Technologies, Inc. Integrated low cost thick film RF module
US20020008963A1 (en) * 1999-07-15 2002-01-24 Dibene, Ii Joseph T. Inter-circuit encapsulated packaging
JP2003023248A (ja) * 2001-07-05 2003-01-24 Nitto Denko Corp 多層フレキシブル配線回路基板およびその製造方法
US7030485B2 (en) * 2003-06-26 2006-04-18 Intel Corporation Thermal interface structure with integrated liquid cooling and methods
JP4098261B2 (ja) * 2004-03-05 2008-06-11 松下電器産業株式会社 曲げ装置

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Publication number Publication date
US20090227136A1 (en) 2009-09-10
JP2009218358A (ja) 2009-09-24

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