JP2009218358A - 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法 - Google Patents
表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法 Download PDFInfo
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- JP2009218358A JP2009218358A JP2008059852A JP2008059852A JP2009218358A JP 2009218358 A JP2009218358 A JP 2009218358A JP 2008059852 A JP2008059852 A JP 2008059852A JP 2008059852 A JP2008059852 A JP 2008059852A JP 2009218358 A JP2009218358 A JP 2009218358A
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- pressing
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- reinforcing member
- mounting structure
- bga package
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- 238000011068 loading method Methods 0.000 title abstract 9
- 230000003014 reinforcing effect Effects 0.000 claims abstract description 93
- 229910000679 solder Inorganic materials 0.000 claims abstract description 45
- 238000000034 method Methods 0.000 claims description 27
- 239000011888 foil Substances 0.000 claims description 11
- 238000002844 melting Methods 0.000 claims description 10
- 230000008018 melting Effects 0.000 claims description 10
- 238000010438 heat treatment Methods 0.000 claims description 5
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 230000000116 mitigating effect Effects 0.000 abstract 1
- 230000035882 stress Effects 0.000 description 15
- 230000002787 reinforcement Effects 0.000 description 7
- 230000001681 protective effect Effects 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- 238000006073 displacement reaction Methods 0.000 description 2
- 101100222092 Caenorhabditis elegans csp-3 gene Proteins 0.000 description 1
- 238000005452 bending Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/301—Assembling printed circuits with electric components, e.g. with resistor by means of a mounting structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10371—Shields or metal cases
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10227—Other objects, e.g. metallic pieces
- H05K2201/10393—Clamping a component by an element or a set of elements
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
【解決手段】表面実装デバイスの実装構造体1を、プリント基板2と、プリント基板2に実装された表面実装デバイスとしてのBGAパッケージ3と、BGAパッケージ3を跨ぐようにプリント基板2に取り付けられた、BGAパッケージ3を覆う補強部材4と、補強部材4の天板4aを貫通してBGAパッケージ3の上面に当接し、半田8によって補強部材4に固定された押さえ部材としての押さえピン9とにより構成する。
【選択図】 図1
Description
(表面実装デバイスの実装構造体)
まず、本発明の実施の形態1の表面実装デバイスの実装構造体について説明する。
次に、本実施の形態の表面実装デバイスの補強実装方法について説明する。
(表面実装デバイスの実装構造体)
まず、本発明の実施の形態2の表面実装デバイスの実装構造体について説明する。
次に、本実施の形態の表面実装デバイスの補強実装方法について説明する。
次に、本発明の実施の形態3の表面実装デバイスの実装構造体について説明する。
2 プリント基板
3 BGAパッケージ(表面実装デバイス)
3a 半田ボール
4、10、12、13、14、15 補強部材
4a、10a、12a、13a、14a、15a 天板
4b、10b、12b、13b、14b、15b 脚部
5 電極パターン(箔ランド)
6 取付用パターン(箔ランド)
7、8 半田
9 押さえピン
11 位置決め孔
12c、13c、14c 取付部
15c 取付用片部
17 押さえバー
17a バー
17b 支持ピン
Claims (10)
- プリント基板に実装された表面実装デバイスと、
前記プリント基板に取り付けられ、前記表面実装デバイスの上面の少なくとも周縁部を覆う天板を有する補強部材と、
前記補強部材の前記天板を貫通して前記表面実装デバイスの上面に当接し、固着部材によって前記天板に固定された押さえ部材とを備えた表面実装デバイスの実装構造体。 - 前記押さえ部材が、押さえピン及び押さえバーの少なくとも1つである、請求項1に記載の表面実装デバイスの実装構造体。
- 前記押さえ部材における前記表面実装デバイスの上面に当接した部位が、前記表面実装デバイスの端子と前記プリント基板の電極との半田接続部の上方に位置している、請求項2に記載の表面実装デバイスの実装構造体。
- 前記押さえピンを4本備え、前記4本の押さえピンは前記表面実装デバイスの上面の4つのコーナー部に当接している、請求項2に記載の表面実装デバイスの実装構造体。
- 前記押さえバーが、前記表面実装デバイスの上面に当接するバーと、前記バーに連結され、前記補強部材の前記天板を貫通する支持ピンとを備えた、請求項2に記載の表面実装デバイスの実装構造体。
- 前記押さえバーを4個備え、前記4個の押さえバーの各バーはそれぞれ前記表面実装デバイスの上面の4つの辺に沿って配置されている、請求項5に記載の表面実装デバイスの実装構造体。
- 前記補強部材が、前記表面実装デバイスの周囲に配置された箔ランド上に固定されている、請求項1〜6のいずれか1項に記載の表面実装デバイスの実装構造体。
- 前記プリント基板に設けられた位置決め孔に、前記補強部材の一部が嵌挿されている、請求項1〜6のいずれか1項に記載の表面実装デバイスの実装構造体。
- 前記表面実装デバイスがボールグリッドアレイパッケージである、請求項1〜8のいずれか1項に記載の表面実装デバイスの実装構造体。
- プリント基板に実装された表面実装デバイスを、天板を貫通して半田付けされた押さえ部材を有する補強部材で覆い、加熱によるリフロー処理によって半田付け部を溶融して前記押さえ部材を自重下降させることにより、前記押さえ部材を前記表面実装デバイスの上面に当接させる表面実装デバイスの補強実装方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008059852A JP4948452B2 (ja) | 2008-03-10 | 2008-03-10 | 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法 |
US12/401,297 US20090227136A1 (en) | 2008-03-10 | 2009-03-10 | Mounting structure for surface mounted device and method of firmly mounting surface mounted device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008059852A JP4948452B2 (ja) | 2008-03-10 | 2008-03-10 | 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2009218358A true JP2009218358A (ja) | 2009-09-24 |
JP2009218358A5 JP2009218358A5 (ja) | 2011-01-27 |
JP4948452B2 JP4948452B2 (ja) | 2012-06-06 |
Family
ID=41054081
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008059852A Expired - Fee Related JP4948452B2 (ja) | 2008-03-10 | 2008-03-10 | 表面実装デバイスの実装構造体、及び表面実装デバイスの補強実装方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US20090227136A1 (ja) |
JP (1) | JP4948452B2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20190100840A (ko) * | 2018-02-21 | 2019-08-29 | 삼성전자주식회사 | 자성체로부터 발생하는 자기력의 적어도 일부를 차폐하기 위한 차폐 부재 및 차폐 부재와 연결된 비자성체 속성을 갖는 연결부를 포함하는 전자 장치 |
KR20230080387A (ko) * | 2018-02-21 | 2023-06-07 | 삼성전자주식회사 | 자성체로부터 발생하는 자기력의 적어도 일부를 차폐하기 위한 차폐 부재 및 차폐 부재와 연결된 비자성체 속성을 갖는 연결부를 포함하는 전자 장치 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5173029B2 (ja) * | 2009-09-17 | 2013-03-27 | 株式会社東芝 | 電子機器 |
CN111246666B (zh) * | 2020-03-11 | 2021-03-26 | 乐清市日精电气有限公司 | 一种光电ic输出光学开关 |
Citations (5)
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JPS59145595A (ja) * | 1983-02-09 | 1984-08-21 | 松下電器産業株式会社 | 電子部品の保持装置 |
JPS6451288A (en) * | 1987-08-24 | 1989-02-27 | Fanuc Ltd | Calibrating apparatus for industrial robot |
JPH0436273A (ja) * | 1989-12-08 | 1992-02-06 | Shell Internatl Res Maatschappij Bv | 複素環式化合物 |
JPH11163494A (ja) * | 1997-11-28 | 1999-06-18 | Toshiba Corp | 表面実装デバイスの実装方法、bgaパッケージの実装構造、及び電子機器 |
JP2005252055A (ja) * | 2004-03-05 | 2005-09-15 | Matsushita Electric Ind Co Ltd | 一括曲げ装置および一括曲げ装置用組み込みユニット |
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2008
- 2008-03-10 JP JP2008059852A patent/JP4948452B2/ja not_active Expired - Fee Related
-
2009
- 2009-03-10 US US12/401,297 patent/US20090227136A1/en not_active Abandoned
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS59145595A (ja) * | 1983-02-09 | 1984-08-21 | 松下電器産業株式会社 | 電子部品の保持装置 |
JPS6451288A (en) * | 1987-08-24 | 1989-02-27 | Fanuc Ltd | Calibrating apparatus for industrial robot |
JPH0436273A (ja) * | 1989-12-08 | 1992-02-06 | Shell Internatl Res Maatschappij Bv | 複素環式化合物 |
JPH11163494A (ja) * | 1997-11-28 | 1999-06-18 | Toshiba Corp | 表面実装デバイスの実装方法、bgaパッケージの実装構造、及び電子機器 |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
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KR20190100840A (ko) * | 2018-02-21 | 2019-08-29 | 삼성전자주식회사 | 자성체로부터 발생하는 자기력의 적어도 일부를 차폐하기 위한 차폐 부재 및 차폐 부재와 연결된 비자성체 속성을 갖는 연결부를 포함하는 전자 장치 |
KR20230080387A (ko) * | 2018-02-21 | 2023-06-07 | 삼성전자주식회사 | 자성체로부터 발생하는 자기력의 적어도 일부를 차폐하기 위한 차폐 부재 및 차폐 부재와 연결된 비자성체 속성을 갖는 연결부를 포함하는 전자 장치 |
KR102540241B1 (ko) * | 2018-02-21 | 2023-06-08 | 삼성전자주식회사 | 자성체로부터 발생하는 자기력의 적어도 일부를 차폐하기 위한 차폐 부재 및 차폐 부재와 연결된 비자성체 속성을 갖는 연결부를 포함하는 전자 장치 |
KR102657345B1 (ko) | 2018-02-21 | 2024-04-16 | 삼성전자 주식회사 | 자성체로부터 발생하는 자기력의 적어도 일부를 차폐하기 위한 차폐 부재 및 차폐 부재와 연결된 비자성체 속성을 갖는 연결부를 포함하는 전자 장치 |
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Publication number | Publication date |
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US20090227136A1 (en) | 2009-09-10 |
JP4948452B2 (ja) | 2012-06-06 |
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