JP4835175B2 - ウェーハの枚葉式エッチング方法 - Google Patents

ウェーハの枚葉式エッチング方法 Download PDF

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Publication number
JP4835175B2
JP4835175B2 JP2006021899A JP2006021899A JP4835175B2 JP 4835175 B2 JP4835175 B2 JP 4835175B2 JP 2006021899 A JP2006021899 A JP 2006021899A JP 2006021899 A JP2006021899 A JP 2006021899A JP 4835175 B2 JP4835175 B2 JP 4835175B2
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Japan
Prior art keywords
wafer
supply
etching
thickness
supply nozzle
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Expired - Fee Related
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JP2006021899A
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English (en)
Japanese (ja)
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JP2007207810A (ja
JP2007207810A5 (enExample
Inventor
栄 古屋田
友裕 橋井
克彦 村山
和成 高石
健夫 加藤
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Sumco Corp
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Sumco Corp
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Publication date
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Priority to JP2006021899A priority Critical patent/JP4835175B2/ja
Priority to KR1020070007123A priority patent/KR100948286B1/ko
Priority to US11/669,431 priority patent/US7906438B2/en
Publication of JP2007207810A publication Critical patent/JP2007207810A/ja
Priority to KR1020090002214A priority patent/KR20090012364A/ko
Publication of JP2007207810A5 publication Critical patent/JP2007207810A5/ja
Application granted granted Critical
Publication of JP4835175B2 publication Critical patent/JP4835175B2/ja
Expired - Fee Related legal-status Critical Current
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67017Apparatus for fluid treatment
    • H01L21/67063Apparatus for fluid treatment for etching
    • H01L21/67075Apparatus for fluid treatment for etching for wet etching
    • H01L21/6708Apparatus for fluid treatment for etching for wet etching using mainly spraying means, e.g. nozzles
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • H01L21/0201Specific process step
    • H01L21/02019Chemical etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Weting (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
JP2006021899A 2006-01-31 2006-01-31 ウェーハの枚葉式エッチング方法 Expired - Fee Related JP4835175B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2006021899A JP4835175B2 (ja) 2006-01-31 2006-01-31 ウェーハの枚葉式エッチング方法
KR1020070007123A KR100948286B1 (ko) 2006-01-31 2007-01-23 매엽식 웨이퍼 식각 장치 및 매엽식 웨이퍼 식각 방법
US11/669,431 US7906438B2 (en) 2006-01-31 2007-01-31 Single wafer etching method
KR1020090002214A KR20090012364A (ko) 2006-01-31 2009-01-12 매엽식 웨이퍼 식각 장치 및 매엽식 웨이퍼 식각 방법

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006021899A JP4835175B2 (ja) 2006-01-31 2006-01-31 ウェーハの枚葉式エッチング方法

Publications (3)

Publication Number Publication Date
JP2007207810A JP2007207810A (ja) 2007-08-16
JP2007207810A5 JP2007207810A5 (enExample) 2010-12-09
JP4835175B2 true JP4835175B2 (ja) 2011-12-14

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JP2006021899A Expired - Fee Related JP4835175B2 (ja) 2006-01-31 2006-01-31 ウェーハの枚葉式エッチング方法

Country Status (3)

Country Link
US (1) US7906438B2 (enExample)
JP (1) JP4835175B2 (enExample)
KR (2) KR100948286B1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101473130B1 (ko) * 2010-11-12 2014-12-15 고쿠리츠 다이가쿠 호진 도호쿠 다이가쿠 초고속 습식 에칭 장치

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008218545A (ja) * 2007-03-01 2008-09-18 Sumco Corp ウェーハの枚葉式エッチング装置
JP2010003847A (ja) * 2008-06-19 2010-01-07 Sumco Corp 半導体ウェーハの製造方法
JP5026356B2 (ja) * 2008-06-26 2012-09-12 Sumco Techxiv株式会社 拡散ウェーハの製造方法
JP2010177541A (ja) * 2009-01-30 2010-08-12 Pre-Tech At:Kk Siウェーハの加工ダメージ除去方法
JP5389473B2 (ja) * 2009-03-03 2014-01-15 株式会社ディスコ スピンナ洗浄装置
KR101044009B1 (ko) * 2009-07-17 2011-06-24 세메스 주식회사 기판 표면을 선택적으로 에칭하기 위한 기판 처리 장치
JP5490659B2 (ja) * 2009-12-09 2014-05-14 東京エレクトロン株式会社 基板処理装置、基板処理方法及びこの基板処理方法を実行させるためのプログラムを記録した記録媒体
JP2012004294A (ja) * 2010-06-16 2012-01-05 Shibaura Mechatronics Corp 基板処理装置および基板処理方法
KR101308352B1 (ko) 2011-12-16 2013-09-17 주식회사 엘지실트론 매엽식 웨이퍼 에칭장치
US9079210B2 (en) * 2013-07-22 2015-07-14 Infineon Technologies Ag Methods for etching a workpiece, an apparatus configured to etch a workpiece, and a non-transitory computer readable medium
JP6311236B2 (ja) * 2013-08-20 2018-04-18 東京エレクトロン株式会社 基板洗浄装置
US9653338B2 (en) * 2013-12-23 2017-05-16 Kla-Tencor Corporation System and method for non-contact wafer chucking
JP6485904B2 (ja) * 2015-03-03 2019-03-20 株式会社Screenホールディングス 基板処理装置
US10403517B2 (en) 2015-02-18 2019-09-03 SCREEN Holdings Co., Ltd. Substrate processing apparatus
US10332761B2 (en) 2015-02-18 2019-06-25 SCREEN Holdings Co., Ltd. Substrate processing apparatus
JP6504540B2 (ja) * 2015-02-25 2019-04-24 株式会社Screenホールディングス 基板処理装置
JP6509583B2 (ja) * 2015-02-25 2019-05-08 株式会社Screenホールディングス 基板処理装置
KR102356217B1 (ko) * 2015-05-14 2022-01-27 에이씨엠 리서치 (상하이) 인코포레이티드 기판 베벨 및 이면 보호를 위한 장치
JP2018147908A (ja) * 2015-07-27 2018-09-20 東京エレクトロン株式会社 基板処理方法および基板処理装置
TWI629720B (zh) * 2015-09-30 2018-07-11 東京威力科創股份有限公司 用於濕蝕刻製程之溫度的動態控制之方法及設備
US10269758B2 (en) * 2015-12-24 2019-04-23 Intel Corporation Systems and processes for measuring thickness values of semiconductor substrates
JP6845696B2 (ja) * 2016-02-25 2021-03-24 芝浦メカトロニクス株式会社 基板処理装置、基板処理方法及び基板の製造方法
WO2017192994A1 (en) * 2016-05-06 2017-11-09 Applied Materials, Inc. Wafer profiling for etching system
DE102017212887A1 (de) 2017-07-26 2019-01-31 Gebr. Schmid Gmbh Verfahren, Vorrichtung und Anlage zur Leiterplattenherstellung
KR101985756B1 (ko) * 2017-08-09 2019-06-04 세메스 주식회사 기판 처리 장치 및 방법
JP2020123676A (ja) * 2019-01-30 2020-08-13 信越半導体株式会社 エッチング方法
KR102826393B1 (ko) * 2024-07-31 2025-06-27 에프엔에스테크 주식회사 미세회로 패턴 형성용 에칭 장치

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JP2983480B2 (ja) 1996-11-27 1999-11-29 株式会社東芝 スピン処理装置
JPH1145872A (ja) * 1997-07-25 1999-02-16 Shin Etsu Handotai Co Ltd 半導体基板の平坦化方法および平坦化装置
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101473130B1 (ko) * 2010-11-12 2014-12-15 고쿠리츠 다이가쿠 호진 도호쿠 다이가쿠 초고속 습식 에칭 장치

Also Published As

Publication number Publication date
US20070175863A1 (en) 2007-08-02
KR20070078981A (ko) 2007-08-03
KR100948286B1 (ko) 2010-03-17
JP2007207810A (ja) 2007-08-16
US7906438B2 (en) 2011-03-15
KR20090012364A (ko) 2009-02-03

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