JP4819325B2 - 集積回路装置及びその動作方法 - Google Patents
集積回路装置及びその動作方法 Download PDFInfo
- Publication number
- JP4819325B2 JP4819325B2 JP2004161460A JP2004161460A JP4819325B2 JP 4819325 B2 JP4819325 B2 JP 4819325B2 JP 2004161460 A JP2004161460 A JP 2004161460A JP 2004161460 A JP2004161460 A JP 2004161460A JP 4819325 B2 JP4819325 B2 JP 4819325B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- switches
- write
- write data
- parallel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
- G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
- G11C7/1027—Static column decode serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled bit line addresses
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
- G11C11/409—Read-write [R-W] circuits
- G11C11/4093—Input/output [I/O] data interface arrangements, e.g. data buffers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/107—Serial-parallel conversion of data or prefetch
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (6)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR20030035604 | 2003-06-03 | ||
KR2003-035604 | 2003-06-03 | ||
KR2003-042840 | 2003-06-27 | ||
KR10-2003-0042840A KR100532444B1 (ko) | 2003-06-03 | 2003-06-27 | N 비트 프리패치 구조로 2n 비트 프리패치 스킴을구현하는 메모리 장치 및 이 메모리 장치의 2n 비트프리패치 방법 및 자동 프리차아지 방법 |
US10/792,425 US7054202B2 (en) | 2003-06-03 | 2004-03-03 | High burst rate write data paths for integrated circuit memory devices and methods of operating same |
US10/792425 | 2004-03-03 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2004362756A JP2004362756A (ja) | 2004-12-24 |
JP2004362756A5 JP2004362756A5 (enrdf_load_stackoverflow) | 2007-03-22 |
JP4819325B2 true JP4819325B2 (ja) | 2011-11-24 |
Family
ID=33545117
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004161460A Expired - Fee Related JP4819325B2 (ja) | 2003-06-03 | 2004-05-31 | 集積回路装置及びその動作方法 |
Country Status (4)
Country | Link |
---|---|
JP (1) | JP4819325B2 (enrdf_load_stackoverflow) |
DE (1) | DE102004026526B4 (enrdf_load_stackoverflow) |
GB (1) | GB2403575B (enrdf_load_stackoverflow) |
TW (1) | TWI250530B (enrdf_load_stackoverflow) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102005001894A1 (de) * | 2005-01-14 | 2006-08-03 | Infineon Technologies Ag | Synchroner Parallel-Serienwandler |
JP5052056B2 (ja) * | 2005-09-29 | 2012-10-17 | エスケーハイニックス株式会社 | 半導体メモリ素子のデータ入力装置 |
JP4470183B2 (ja) | 2006-08-28 | 2010-06-02 | エルピーダメモリ株式会社 | 半導体記憶装置 |
KR20080065100A (ko) | 2007-01-08 | 2008-07-11 | 주식회사 하이닉스반도체 | 반도체 메모리 소자와 그의 구동 방법 |
KR101094946B1 (ko) | 2010-01-29 | 2011-12-15 | 주식회사 하이닉스반도체 | 반도체 집적 회로 |
JP2013206492A (ja) * | 2012-03-27 | 2013-10-07 | Toshiba Corp | 半導体装置およびその駆動方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59180871A (ja) * | 1983-03-31 | 1984-10-15 | Fujitsu Ltd | 半導体メモリ装置 |
US4745577A (en) * | 1984-11-20 | 1988-05-17 | Fujitsu Limited | Semiconductor memory device with shift registers for high speed reading and writing |
JPH0740430B2 (ja) * | 1986-07-04 | 1995-05-01 | 日本電気株式会社 | メモリ装置 |
TW293107B (enrdf_load_stackoverflow) * | 1994-10-28 | 1996-12-11 | Matsushita Electric Ind Co Ltd | |
JP3788867B2 (ja) * | 1997-10-28 | 2006-06-21 | 株式会社東芝 | 半導体記憶装置 |
US6459393B1 (en) * | 1998-05-08 | 2002-10-01 | International Business Machines Corporation | Apparatus and method for optimized self-synchronizing serializer/deserializer/framer |
JP2000163969A (ja) * | 1998-09-16 | 2000-06-16 | Fujitsu Ltd | 半導体記憶装置 |
DE19951677B4 (de) * | 1998-10-30 | 2006-04-13 | Fujitsu Ltd., Kawasaki | Halbleiterspeichervorrichtung |
JP3859885B2 (ja) * | 1998-11-24 | 2006-12-20 | Necエレクトロニクス株式会社 | 半導体記憶装置 |
JP4083944B2 (ja) * | 1999-12-13 | 2008-04-30 | 東芝マイクロエレクトロニクス株式会社 | 半導体記憶装置 |
-
2004
- 2004-05-25 DE DE102004026526A patent/DE102004026526B4/de not_active Expired - Fee Related
- 2004-05-31 JP JP2004161460A patent/JP4819325B2/ja not_active Expired - Fee Related
- 2004-06-03 GB GB0412446A patent/GB2403575B/en not_active Expired - Fee Related
- 2004-06-03 TW TW093115984A patent/TWI250530B/zh not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
GB0412446D0 (en) | 2004-07-07 |
GB2403575A (en) | 2005-01-05 |
DE102004026526B4 (de) | 2010-09-23 |
JP2004362756A (ja) | 2004-12-24 |
GB2403575B (en) | 2007-05-16 |
TWI250530B (en) | 2006-03-01 |
TW200516595A (en) | 2005-05-16 |
DE102004026526A1 (de) | 2005-01-13 |
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