JP4744435B2 - 半導体の整合補助部 - Google Patents
半導体の整合補助部 Download PDFInfo
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- JP4744435B2 JP4744435B2 JP2006508657A JP2006508657A JP4744435B2 JP 4744435 B2 JP4744435 B2 JP 4744435B2 JP 2006508657 A JP2006508657 A JP 2006508657A JP 2006508657 A JP2006508657 A JP 2006508657A JP 4744435 B2 JP4744435 B2 JP 4744435B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/544—Marks applied to semiconductor devices or parts, e.g. registration marks, alignment structures, wafer maps
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/5442—Marks applied to semiconductor devices or parts comprising non digital, non alphanumeric information, e.g. symbols
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
- H01L2223/5446—Located in scribe lines
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
- Semiconductor Integrated Circuits (AREA)
Description
異なる図面における同じ参照記号の使用は、他に言及のない限り同一の部材を示す。図1,2,3は、必ずしも同じ縮尺に従っていない。
図1は、本発明による半導体ウエハの一実施態様の部分平面図である。図1には、スクライブ領域111によって隔てられた隅部分の4つのダイ領域(ダイ領域103、ダイ領域105、ダイ領域107、ダイ領域109)を示す。製造のさらに後の段階では、ダイ領域103,105,107,109をシンギュレーションして(singulate)分離した半導体ダイを形成するために、ウエハがスクライブ領域111に沿って切断される。
Claims (5)
- レーザで走査されることによって指標の情報を与える、半導体デバイス用の整合補助部であって、
第1の反射度を有する第1領域と、
複数の相互接続層のうちの1つ以上の相互接続層に各々配置された1つ以上のタイル層を有し、第1の反射度未満の第2の反射度を有し、かつ第1領域に隣接する第2領域とを備え、
前記1つ以上のタイル層は半導体デバイスの能動回路の直上に配置されており、前記1つ以上のタイル層の各層は複数のタイルを含み、前記複数のタイルの各タイルはレーザ走査方向においてレーザ光の波長より短い幅を有し、前記複数のタイルの各タイルは隣接するタイルから、整合補助部を走査するように設計されているレーザ光の波長より短い間隔だけ、整合補助部のレーザ走査方向において離間されている整合補助部。 - 前記1つ以上のタイル層の各層は自身の配置されている相互接続層より下に位置する相互接続層による反射度を減少させる、請求項1に記載の整合補助部。
- 半導体デバイスであって、
半導体基板と、
半導体基板の上方に配置された複数の相互接続層を有する相互接続層部分と、
第1の反射度を有する第1領域と、第1の反射度未満の第2の反射度を有し、かつ第1領域に隣接する第2領域とを備え、レーザで走査されることによって指標の情報を与える整合補助部と、
相互接続層部分は、複数の相互接続層に各々配置され、かつ第2領域に配置されている1つ以上のタイル層を有することと、
同1つ以上のタイル層の直下に配置された能動回路とを含み、
前記1つ以上のタイル層の各層は複数のタイルを含み、前記複数のタイルの各タイルはレーザ走査方向においてレーザ光の波長より短い幅を有し、前記複数のタイルの各タイルは隣接するタイルから、整合補助部を走査するように設計されているレーザ光の波長より短い間隔だけ、整合補助部のレーザ走査方向において離間されている、半導体デバイス。 - 第1領域は複数の相互接続層のうちの上部の層に反射性材料からなる整合フィーチャ構造を含む請求項3に記載の半導体デバイス。
- レーザで走査されることによって指標の情報を与える整合補助部を半導体デバイスに装備する方法であって、
半導体デバイスの所定部分に第1の反射度を有する第1領域を提供する第1領域提供工程と、
半導体デバイスの相互接続層に各々配置された1つ以上のタイル層を有し、第1の反射度未満の第2の反射度を有し、かつ第1領域に隣接する第2領域を提供する第2領域提供工程と、
同1つ以上のタイル層の直下の能動回路を提供する能動回路提供工程とを含み、
前記1つ以上のタイル層の各層は複数のタイルを含み、前記複数のタイルの各タイルはレーザ走査方向においてレーザ光の波長より短い幅を有し、前記複数のタイルの各タイルは隣接するタイルから、整合補助部を走査するように設計されているレーザ光の波長より短い間隔だけ、整合補助部のレーザ走査方向において離間されている、方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/402,539 US6933523B2 (en) | 2003-03-28 | 2003-03-28 | Semiconductor alignment aid |
US10/402,539 | 2003-03-28 | ||
PCT/US2004/003097 WO2004095524A2 (en) | 2003-03-28 | 2004-02-04 | Semiconductor alignment aid |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007524991A JP2007524991A (ja) | 2007-08-30 |
JP4744435B2 true JP4744435B2 (ja) | 2011-08-10 |
Family
ID=32989720
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006508657A Expired - Fee Related JP4744435B2 (ja) | 2003-03-28 | 2004-02-04 | 半導体の整合補助部 |
Country Status (7)
Country | Link |
---|---|
US (1) | US6933523B2 (ja) |
EP (1) | EP1611598A2 (ja) |
JP (1) | JP4744435B2 (ja) |
KR (1) | KR101078610B1 (ja) |
CN (1) | CN101385141A (ja) |
TW (1) | TWI330895B (ja) |
WO (1) | WO2004095524A2 (ja) |
Families Citing this family (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7247952B2 (en) * | 2003-10-30 | 2007-07-24 | Hewlett-Packard Development Company, L.P. | Optical targets |
JP4520429B2 (ja) * | 2005-06-01 | 2010-08-04 | エーエスエムエル ネザーランズ ビー.ブイ. | 位置合わせ装置への2次元フォトニック結晶の応用 |
US7737566B2 (en) * | 2005-06-01 | 2010-06-15 | Asml Netherlands B.V. | Alignment devices and methods for providing phase depth control |
US8000826B2 (en) * | 2006-01-24 | 2011-08-16 | Synopsys, Inc. | Predicting IC manufacturing yield by considering both systematic and random intra-die process variations |
JP5259211B2 (ja) | 2008-02-14 | 2013-08-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US7951695B2 (en) * | 2008-05-22 | 2011-05-31 | Freescale Semiconductor, Inc. | Method for reducing plasma discharge damage during processing |
US7896702B2 (en) * | 2008-06-06 | 2011-03-01 | Apple Inc. | Compact power adapter |
JP5623033B2 (ja) * | 2009-06-23 | 2014-11-12 | ルネサスエレクトロニクス株式会社 | 半導体装置、リソグラフィ方法、及び半導体装置の製造方法 |
JP2012222161A (ja) * | 2011-04-08 | 2012-11-12 | Elpida Memory Inc | 半導体装置 |
CN102290362B (zh) * | 2011-07-22 | 2013-05-22 | 清华大学 | 一种激光加工中晶圆片定位误差的校正方法 |
JP6076123B2 (ja) | 2013-02-14 | 2017-02-08 | オリンパス株式会社 | 半導体基板、撮像素子、および撮像装置 |
JP6300301B2 (ja) * | 2013-11-20 | 2018-03-28 | ローム株式会社 | 半導体装置および半導体装置の製造方法 |
JP5805818B2 (ja) * | 2014-03-31 | 2015-11-10 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP6030200B2 (ja) * | 2015-09-02 | 2016-11-24 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US10700013B2 (en) * | 2018-01-10 | 2020-06-30 | Globalfoundries Inc. | IC wafer for identification of circuit dies after dicing |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04330710A (ja) * | 1990-03-12 | 1992-11-18 | Fujitsu Ltd | レーザトリミング用位置合わせマーク、半導体装置、及び半導体装置の製造方法 |
JP2000012431A (ja) * | 1998-06-22 | 2000-01-14 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2001297958A (ja) * | 2000-04-17 | 2001-10-26 | Toshiba Corp | 半導体集積装置 |
Family Cites Families (23)
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US4425037A (en) * | 1981-05-15 | 1984-01-10 | General Signal Corporation | Apparatus for projecting a series of images onto dies of a semiconductor wafer |
US4444492A (en) * | 1982-05-15 | 1984-04-24 | General Signal Corporation | Apparatus for projecting a series of images onto dies of a semiconductor wafer |
US5162867A (en) * | 1990-01-26 | 1992-11-10 | Canon Kabushiki Kaisha | Surface condition inspection method and apparatus using image transfer |
JP2974818B2 (ja) * | 1991-04-30 | 1999-11-10 | 株式会社コパル | プログラムシャッタの制御装置 |
US5311061A (en) * | 1993-05-19 | 1994-05-10 | Motorola Inc. | Alignment key for a semiconductor device having a seal against ionic contamination |
US5781682A (en) * | 1996-02-01 | 1998-07-14 | International Business Machines Corporation | Low-cost packaging for parallel optical computer link |
US6307273B1 (en) | 1996-06-07 | 2001-10-23 | Vanguard International Semiconductor Corporation | High contrast, low noise alignment mark for laser trimming of redundant memory arrays |
US5986319A (en) | 1997-03-19 | 1999-11-16 | Clear Logic, Inc. | Laser fuse and antifuse structures formed over the active circuitry of an integrated circuit |
US5847823A (en) * | 1997-04-28 | 1998-12-08 | International Business Machines Corporation | Surface inspection tool |
US5952135A (en) * | 1997-11-19 | 1999-09-14 | Vlsi Technology | Method for alignment using multiple wavelengths of light |
KR100324110B1 (ko) * | 1999-07-31 | 2002-02-16 | 구본준, 론 위라하디락사 | 액정표시소자의 얼라인패턴 |
US6452284B1 (en) * | 2000-06-22 | 2002-09-17 | Motorola, Inc. | Semiconductor device substrate and a process for altering a semiconductor device |
US6448632B1 (en) * | 2000-08-28 | 2002-09-10 | National Semiconductor Corporation | Metal coated markings on integrated circuit devices |
TW457545B (en) * | 2000-09-28 | 2001-10-01 | Advanced Semiconductor Eng | Substrate to form electronic package |
US6629292B1 (en) * | 2000-10-06 | 2003-09-30 | International Business Machines Corporation | Method for forming graphical images in semiconductor devices |
US6486066B2 (en) * | 2001-02-02 | 2002-11-26 | Matrix Semiconductor, Inc. | Method of generating integrated circuit feature layout for improved chemical mechanical polishing |
US6680213B2 (en) | 2001-04-02 | 2004-01-20 | Micron Technology, Inc. | Method and system for fabricating contacts on semiconductor components |
US6611045B2 (en) | 2001-06-04 | 2003-08-26 | Motorola, Inc. | Method of forming an integrated circuit device using dummy features and structure thereof |
US6465898B1 (en) * | 2001-07-23 | 2002-10-15 | Texas Instruments Incorporated | Bonding alignment mark for bonds over active circuits |
US6577020B2 (en) * | 2001-10-11 | 2003-06-10 | Taiwan Semiconductor Manufacturing Co., Ltd | High contrast alignment marks having flexible placement |
US6613688B1 (en) * | 2002-04-26 | 2003-09-02 | Motorola, Inc. | Semiconductor device and process for generating an etch pattern |
US6531387B1 (en) * | 2002-06-17 | 2003-03-11 | Mosel Vitelic, Inc. | Polishing of conductive layers in fabrication of integrated circuits |
US6661106B1 (en) * | 2002-08-13 | 2003-12-09 | International Business Machines Corporation | Alignment mark structure for laser fusing and method of use |
-
2003
- 2003-03-28 US US10/402,539 patent/US6933523B2/en not_active Expired - Lifetime
-
2004
- 2004-01-16 TW TW093101216A patent/TWI330895B/zh not_active IP Right Cessation
- 2004-02-04 KR KR1020057018331A patent/KR101078610B1/ko not_active IP Right Cessation
- 2004-02-04 CN CNA2004800085678A patent/CN101385141A/zh active Pending
- 2004-02-04 JP JP2006508657A patent/JP4744435B2/ja not_active Expired - Fee Related
- 2004-02-04 EP EP04708121A patent/EP1611598A2/en not_active Withdrawn
- 2004-02-04 WO PCT/US2004/003097 patent/WO2004095524A2/en active Application Filing
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04330710A (ja) * | 1990-03-12 | 1992-11-18 | Fujitsu Ltd | レーザトリミング用位置合わせマーク、半導体装置、及び半導体装置の製造方法 |
JP2000012431A (ja) * | 1998-06-22 | 2000-01-14 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2001297958A (ja) * | 2000-04-17 | 2001-10-26 | Toshiba Corp | 半導体集積装置 |
Also Published As
Publication number | Publication date |
---|---|
WO2004095524A2 (en) | 2004-11-04 |
TW200503282A (en) | 2005-01-16 |
JP2007524991A (ja) | 2007-08-30 |
WO2004095524A3 (en) | 2008-11-13 |
EP1611598A2 (en) | 2006-01-04 |
KR101078610B1 (ko) | 2011-11-01 |
US20040188709A1 (en) | 2004-09-30 |
CN101385141A (zh) | 2009-03-11 |
KR20050116835A (ko) | 2005-12-13 |
TWI330895B (en) | 2010-09-21 |
US6933523B2 (en) | 2005-08-23 |
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