JP4739680B2 - 半導体装置の製造方法及び半導体装置 - Google Patents
半導体装置の製造方法及び半導体装置 Download PDFInfo
- Publication number
- JP4739680B2 JP4739680B2 JP2004028365A JP2004028365A JP4739680B2 JP 4739680 B2 JP4739680 B2 JP 4739680B2 JP 2004028365 A JP2004028365 A JP 2004028365A JP 2004028365 A JP2004028365 A JP 2004028365A JP 4739680 B2 JP4739680 B2 JP 4739680B2
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- Prior art keywords
- thiol
- bare chip
- circuit conductor
- gold layer
- treated film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Die Bonding (AREA)
Description
2 絶縁基材
3 銅層
4 ニッケル層
5 金層
6a,6b 回路導体
7 チオール処理膜
8 導電性接着剤
9 半導体ベアチップ
10 有機物
11 電極
12 ボンディングワイヤ
13 樹脂
Claims (4)
- 最下層の導体上に中間層のニッケル層が形成され、更に該ニッケル層の上に最上層の金層が形成された多層メッキの回路導体を有するプリント基板の前記金層の表面にチオール処理膜を形成するチオール処理工程と、
前記チオール処理膜が形成された回路導体上に接着剤を介して半導体ベアチップを搭載するダイボンディング工程と、
前記チオール処理膜が形成された回路導体上に、前記半導体ベアチップに設けられた電極と接続するボンディングワイヤをワイヤボンディングにより、前記チオール処理膜の一部を破壊して前記ボンディングワイヤと前記金層との直接接合を形成するワイヤボンディング工程と、を有する半導体装置の製造方法。 - 前記チオール処理工程でチオール処理膜が形成された回路導体に接着剤を介して搭載された半導体ベアチップに設けられた電極と前記半導体ベアチップが搭載された回路導体とは独立した回路導体とをボンディングワイヤによって接続するワイヤボンディング工程に先立って、前記チオール処理膜上に堆積した有機物を除去する有機物洗浄工程を設けたことを特徴とする請求項1に記載の半導体装置の製造方法。
- 前記ダイボンディング工程において、加熱処理が施されることを特徴とする請求項1または2のいずれかに記載の半導体装置の製造方法。
- プリント基板上に形成され、ニッケル層および最上層となる金層を含む多層メッキから構成される回路導体と、
前記金層上にニッケル化合物を介さずに形成されたチオール処理膜と、
前記チオール処理膜上に接着剤を介して搭載された半導体ベアチップと、
前記半導体ベアチップの上面に形成された電極と前記回路導体を接続するボンディングワイヤとを有し、
前記ボンディングワイヤは、前記チオール処理膜を貫通し、その端部が前記金層と直接接合していることを特徴とする半導体装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004028365A JP4739680B2 (ja) | 2004-02-04 | 2004-02-04 | 半導体装置の製造方法及び半導体装置 |
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JP2004028365A JP4739680B2 (ja) | 2004-02-04 | 2004-02-04 | 半導体装置の製造方法及び半導体装置 |
Publications (2)
Publication Number | Publication Date |
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JP2005223088A JP2005223088A (ja) | 2005-08-18 |
JP4739680B2 true JP4739680B2 (ja) | 2011-08-03 |
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JP2004028365A Expired - Fee Related JP4739680B2 (ja) | 2004-02-04 | 2004-02-04 | 半導体装置の製造方法及び半導体装置 |
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JP (1) | JP4739680B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008042824B4 (de) | 2008-10-14 | 2022-01-27 | Robert Bosch Gmbh | Elektrischer Leiter und Verfahren zur Herstellung eines elektrischen Leiters |
JP5328473B2 (ja) * | 2009-05-14 | 2013-10-30 | 株式会社アルバック | 治具およびその製造方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01150493A (ja) * | 1987-12-08 | 1989-06-13 | Asahi Chem Res Lab Ltd | はんだ付け用一時接着剤 |
JPH02299287A (ja) * | 1989-05-15 | 1990-12-11 | Shin Etsu Chem Co Ltd | プリント回路基板の洗浄方法 |
JPH06291453A (ja) * | 1993-04-06 | 1994-10-18 | Hitachi Ltd | 洗浄装置 |
JP2783133B2 (ja) * | 1993-09-29 | 1998-08-06 | 松下電器産業株式会社 | ワイヤボンディング前処理方法 |
JP3702656B2 (ja) * | 1998-07-01 | 2005-10-05 | セイコーエプソン株式会社 | 圧電素子およびその製造方法 |
JP2003133717A (ja) * | 2001-10-29 | 2003-05-09 | Matsushita Electric Ind Co Ltd | 電子部品実装方法および実装システム |
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2004
- 2004-02-04 JP JP2004028365A patent/JP4739680B2/ja not_active Expired - Fee Related
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