JP4721196B2 - 印刷回路基板の製造方法 - Google Patents
印刷回路基板の製造方法 Download PDFInfo
- Publication number
- JP4721196B2 JP4721196B2 JP2008155567A JP2008155567A JP4721196B2 JP 4721196 B2 JP4721196 B2 JP 4721196B2 JP 2008155567 A JP2008155567 A JP 2008155567A JP 2008155567 A JP2008155567 A JP 2008155567A JP 4721196 B2 JP4721196 B2 JP 4721196B2
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- JP
- Japan
- Prior art keywords
- protective layer
- circuit board
- printed circuit
- circuit pattern
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/007—Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/427—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in metal-clad substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0352—Differences between the conductors of different layers of a multilayer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0388—Other aspects of conductors
- H05K2201/0394—Conductor crossing over a hole in the substrate or a gap between two separate substrate parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0147—Carriers and holders
- H05K2203/0156—Temporary polymeric carrier or foil, e.g. for processing or transferring
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/13—Moulding and encapsulation; Deposition techniques; Protective layers
- H05K2203/1377—Protective layers
- H05K2203/1394—Covering open PTHs, e.g. by dry film resist or by metal disc
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/14—Related to the order of processing steps
- H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/15—Position of the PCB during processing
- H05K2203/1536—Temporarily stacked PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Description
111 絶縁層
112 銅薄
12 第1保護層
13 ビアホール
14 第1回路パターン
15 ビア
16 第2保護層
17 第2回路パターン
Claims (16)
- コア板の一面に第1保護層を形成する段階と、
第1工法により前記コア板の他面に第1回路パターンを形成する段階と、
前記第1保護層を除去する段階と、
前記コア板の他面に第2保護層を形成する段階と、
第2工法により前記コア板の一面に第2回路パターンを形成する段階とを含み、
前記コア板は、銅張積層板(CCL)であり、
前記第1及び第2保護層は、発泡テープである
ことを特徴とする印刷回路基板の製造方法。 - 前記第1工法は、テンティング(tenting)工法、セミアディティブ(semi-additive)工法、及びアディティブ(additive)工法からなる群より選ばれる何れか一つであることを特徴とする請求項1に記載の印刷回路基板の製造方法。
- 前記第2工法は、テンティング工法、セミアディティブ工法、及びアディティブ工法からなる群より選ばれる何れか一つであることを特徴とする請求項1または請求項2に記載の印刷回路基板の製造方法。
- 前記第2回路パターンの側面は前記第1回路パターンの側面より少なく傾くことを特徴とする請求項1から請求項3のいずれか1項に記載の印刷回路基板の製造方法。
- 前記第1回路パターンの内部には、境界面が形成されることを特徴とする請求項1から請求項4のいずれか1項に記載の印刷回路基板の製造方法。
- 前記第1保護層を除去する段階は、前記第1保護層の温度を増加させて除去する
請求項1から請求項5のいずれか1項に記載の印刷回路基板の製造方法。 - 前記第2保護層を形成する段階の後に、前記第2保護層を除去する段階を
更に含む請求項1から請求項6のいずれか1項に記載の印刷回路基板の製造方法。 - 前記第2保護層を除供する段階では、前記第2保護層の温度を増加させて除去する
請求項7に記載の印刷回路基板の製造方法。 - 第1保護層の両面に一対のコア板それぞれの一面を付着する段階と、
第1工法により前記一対のコア板の他面に第1回路パターンを形成する段階と、
前記一対のコア板を前記第1保護層から分離する段階と、
第2保護層の両面に前記一対のコア板それぞれの他面を付着する段階と、
第2工法により前記一対のコア板の一面に第2回路パターンを形成する段階と、
を含み、
前記一対のコア板は、銅張積層板(CCL)であり、
前記第1及び第2保護層は、発泡テープである
ことを特徴とする印刷回路基板の製造方法。 - 前記第1工法は、テンティング工法、セミアディティブ工法、及びアディティブ工法からなる群より選ばれる何れか一つであることを特徴とする請求項9に記載の印刷回路基板の製造方法。
- 前記第2工法は、テンティング工法、セミアディティブ工法、アディティブ工法からなる群より選ばれる何れか一つであることを特徴とする請求項9または10に記載の印刷回路基板の製造方法。
- 前記第2回路パターンの側面が前記第1回路パターンの側面より少なく傾くことを特徴とする請求項9から請求項11のいずれか1項に記載の印刷回路基板の製造方法。
- 前記第1回路パターンの内部には、境界面が形成されることを特徴とする請求項9から請求項12のいずれか1項に記載の印刷回路基板の製造方法。
- 前記一対のコア板から前記第1保護層から分離する段階は、前記第1保護層の温度を増加させて除去する
請求項9から請求項13のいずれか1項に記載の印刷回路基板の製造方法。 - 前記第2保護層に前記一対のコア板を付着した段階の後に、前記第2保護層を除去する段階を
更に含む請求項9から請求項14のいずれか1項に記載の印刷回路基板の製造方法。 - 前記第2保護層を除去する段階では、前記第2保護層の温度を増加させて除去する
請求項15に記載の印刷回路基板の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020080000799A KR100951449B1 (ko) | 2008-01-03 | 2008-01-03 | 인쇄회로기판 및 그 제조방법 |
KR10-2008-0000799 | 2008-01-03 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009164557A JP2009164557A (ja) | 2009-07-23 |
JP4721196B2 true JP4721196B2 (ja) | 2011-07-13 |
Family
ID=40843676
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008155567A Expired - Fee Related JP4721196B2 (ja) | 2008-01-03 | 2008-06-13 | 印刷回路基板の製造方法 |
Country Status (3)
Country | Link |
---|---|
US (2) | US8181339B2 (ja) |
JP (1) | JP4721196B2 (ja) |
KR (1) | KR100951449B1 (ja) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9086737B2 (en) * | 2006-06-15 | 2015-07-21 | Apple Inc. | Dynamically controlled keyboard |
KR20110037332A (ko) * | 2009-10-06 | 2011-04-13 | 삼성전기주식회사 | 인쇄회로기판 및 그 제조방법 |
DE102010016780B4 (de) | 2010-05-04 | 2021-08-12 | Cicor Management AG | Verfahren zur Herstellung einer flexiblen Schaltungsanordnung |
KR101148745B1 (ko) * | 2010-07-14 | 2012-05-23 | 삼성전기주식회사 | 반도체 패키지 기판의 제조방법 |
JP6029958B2 (ja) * | 2012-12-04 | 2016-11-24 | 新光電気工業株式会社 | 配線基板の製造方法 |
CN104659017A (zh) * | 2013-11-20 | 2015-05-27 | 宏启胜精密电子(秦皇岛)有限公司 | 中介板及其制作方法 |
TWI499364B (zh) * | 2014-01-03 | 2015-09-01 | Subtron Technology Co Ltd | 核心基材與線路板的製作方法 |
CN111787708A (zh) * | 2020-06-24 | 2020-10-16 | 西安金百泽电路科技有限公司 | 一种高低铜pad线路板的制作方法 |
KR20220052154A (ko) * | 2020-10-20 | 2022-04-27 | 삼성전자주식회사 | 회로 기판 및 상기 회로 기판을 포함하는 전자 장치 |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004265967A (ja) * | 2003-02-28 | 2004-09-24 | Nec Toppan Circuit Solutions Inc | 多層プリント配線板及びその製造方法並びに半導体装置 |
Family Cites Families (12)
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---|---|---|---|---|
US5116459A (en) * | 1991-03-06 | 1992-05-26 | International Business Machines Corporation | Processes for electrically conductive decals filled with organic insulator material |
US5108541A (en) * | 1991-03-06 | 1992-04-28 | International Business Machines Corp. | Processes for electrically conductive decals filled with inorganic insulator material |
FI982568A (fi) * | 1997-12-02 | 1999-06-03 | Samsung Electro Mech | Menetelmä monikerroksisen painetun piirilevyn valmistamiseksi |
JP4066522B2 (ja) * | 1998-07-22 | 2008-03-26 | イビデン株式会社 | プリント配線板 |
US6323435B1 (en) * | 1998-07-31 | 2001-11-27 | Kulicke & Soffa Holdings, Inc. | Low-impedance high-density deposited-on-laminate structures having reduced stress |
JP3015788B1 (ja) * | 1998-11-19 | 2000-03-06 | 日東電工株式会社 | 導電層転写シート、その転写方法及び電気部品 |
JP2000307217A (ja) * | 1999-04-26 | 2000-11-02 | Shinko Electric Ind Co Ltd | 配線パターンの形成方法及び半導体装置 |
WO2000076281A1 (fr) * | 1999-06-02 | 2000-12-14 | Ibiden Co., Ltd. | Carte a circuit imprime multicouche et procede de fabrication d'une telle carte |
JP2002261440A (ja) * | 2001-03-01 | 2002-09-13 | Sony Chem Corp | フレキシブル配線基板の製造方法及びフレキシブル配線基板 |
JP2002374054A (ja) * | 2001-06-15 | 2002-12-26 | Ibiden Co Ltd | プリント基板の製造方法 |
KR100582079B1 (ko) * | 2003-11-06 | 2006-05-23 | 엘지전자 주식회사 | 인쇄회로기판 및 그 제조방법 |
KR101199285B1 (ko) * | 2004-02-04 | 2012-11-12 | 이비덴 가부시키가이샤 | 다층프린트배선판 |
-
2008
- 2008-01-03 KR KR1020080000799A patent/KR100951449B1/ko not_active IP Right Cessation
- 2008-06-13 JP JP2008155567A patent/JP4721196B2/ja not_active Expired - Fee Related
- 2008-06-23 US US12/213,703 patent/US8181339B2/en not_active Expired - Fee Related
-
2012
- 2012-04-18 US US13/449,847 patent/US20120199388A1/en not_active Abandoned
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2004265967A (ja) * | 2003-02-28 | 2004-09-24 | Nec Toppan Circuit Solutions Inc | 多層プリント配線板及びその製造方法並びに半導体装置 |
Also Published As
Publication number | Publication date |
---|---|
JP2009164557A (ja) | 2009-07-23 |
KR100951449B1 (ko) | 2010-04-07 |
US8181339B2 (en) | 2012-05-22 |
KR20090075041A (ko) | 2009-07-08 |
US20090173531A1 (en) | 2009-07-09 |
US20120199388A1 (en) | 2012-08-09 |
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