JP4677407B2 - 有機反射防止膜(arc)を有する半導体装置の製造方法 - Google Patents
有機反射防止膜(arc)を有する半導体装置の製造方法 Download PDFInfo
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- JP4677407B2 JP4677407B2 JP2006521869A JP2006521869A JP4677407B2 JP 4677407 B2 JP4677407 B2 JP 4677407B2 JP 2006521869 A JP2006521869 A JP 2006521869A JP 2006521869 A JP2006521869 A JP 2006521869A JP 4677407 B2 JP4677407 B2 JP 4677407B2
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- photoresist
- teos
- arc
- semiconductor device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02263—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase
- H01L21/02271—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H01L21/02274—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process deposition from the gas or vapour phase deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
- H01L21/0276—Photolithographic processes using an anti-reflective coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0332—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their composition, e.g. multilayer masks, materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0338—Process specially adapted to improve the resolution of the mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28035—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being silicon, e.g. polysilicon, with or without impurities
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H01L21/28123—Lithography-related aspects, e.g. sub-lithography lengths; Isolation-related aspects, e.g. to solve problems arising at the crossing with the side of the device isolation; Planarisation aspects
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32139—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
- H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/902—Capping layer
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/948—Radiation resist
- Y10S438/952—Utilizing antireflective layer
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Plasma & Fusion (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/628,668 US6972255B2 (en) | 2003-07-28 | 2003-07-28 | Semiconductor device having an organic anti-reflective coating (ARC) and method therefor |
| PCT/US2004/022434 WO2005013320A2 (en) | 2003-07-28 | 2004-07-13 | A semiconductor device having an organic anti-reflective coating (arc) and method therefor |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007500443A JP2007500443A (ja) | 2007-01-11 |
| JP2007500443A5 JP2007500443A5 (enExample) | 2007-08-23 |
| JP4677407B2 true JP4677407B2 (ja) | 2011-04-27 |
Family
ID=34103421
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006521869A Expired - Lifetime JP4677407B2 (ja) | 2003-07-28 | 2004-07-13 | 有機反射防止膜(arc)を有する半導体装置の製造方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (3) | US6972255B2 (enExample) |
| EP (1) | EP1652225A4 (enExample) |
| JP (1) | JP4677407B2 (enExample) |
| KR (1) | KR101164690B1 (enExample) |
| CN (1) | CN100461350C (enExample) |
| TW (1) | TWI348777B (enExample) |
| WO (1) | WO2005013320A2 (enExample) |
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| US6573030B1 (en) * | 2000-02-17 | 2003-06-03 | Applied Materials, Inc. | Method for depositing an amorphous carbon layer |
| US6972255B2 (en) * | 2003-07-28 | 2005-12-06 | Freescale Semiconductor, Inc. | Semiconductor device having an organic anti-reflective coating (ARC) and method therefor |
| DE10339988B4 (de) * | 2003-08-29 | 2008-06-12 | Advanced Micro Devices, Inc., Sunnyvale | Verfahren zur Herstellung einer antireflektierenden Schicht |
| US7176130B2 (en) * | 2004-11-12 | 2007-02-13 | Freescale Semiconductor, Inc. | Plasma treatment for surface of semiconductor device |
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| US7371695B2 (en) * | 2006-01-04 | 2008-05-13 | Promos Technologies Pte. Ltd. | Use of TEOS oxides in integrated circuit fabrication processes |
| JP2007311508A (ja) * | 2006-05-17 | 2007-11-29 | Nikon Corp | 微細パターン形成方法及びデバイス製造方法 |
| JP2008091825A (ja) * | 2006-10-05 | 2008-04-17 | Nec Electronics Corp | 半導体装置の製造方法 |
| US7727829B2 (en) * | 2007-02-06 | 2010-06-01 | Freescale Semiconductor, Inc. | Method of forming a semiconductor device having a removable sidewall spacer |
| US7737018B2 (en) * | 2007-02-06 | 2010-06-15 | Freescale Semiconductor, Inc. | Process of forming an electronic device including forming a gate electrode layer and forming a patterned masking layer |
| US20090104541A1 (en) * | 2007-10-23 | 2009-04-23 | Eui Kyoon Kim | Plasma surface treatment to prevent pattern collapse in immersion lithography |
| KR100983724B1 (ko) | 2007-12-20 | 2010-09-24 | 주식회사 하이닉스반도체 | 반도체 소자의 형성 방법 |
| US20090197086A1 (en) * | 2008-02-04 | 2009-08-06 | Sudha Rathi | Elimination of photoresist material collapse and poisoning in 45-nm feature size using dry or immersion lithography |
| CN102087993B (zh) * | 2009-12-04 | 2013-01-23 | 中芯国际集成电路制造(上海)有限公司 | 沟槽形成方法 |
| CN102867742B (zh) * | 2012-09-17 | 2015-06-24 | 上海华力微电子有限公司 | 一种消除形貌变形的等离子刻蚀方法 |
| US9640430B2 (en) | 2015-09-17 | 2017-05-02 | Nxp Usa, Inc. | Semiconductor device with graphene encapsulated metal and method therefor |
| US10510582B2 (en) | 2016-06-14 | 2019-12-17 | QROMIS, Inc. | Engineered substrate structure |
| US10297445B2 (en) | 2016-06-14 | 2019-05-21 | QROMIS, Inc. | Engineered substrate structure for power and RF applications |
| EP3469119A4 (en) * | 2016-06-14 | 2020-02-26 | Qromis, Inc. | TECHNICAL SUBSTRATE STRUCTURE FOR POWER AND RADIO FREQUENCY APPLICATIONS |
| CN110660839B (zh) * | 2019-11-13 | 2022-04-29 | 京东方科技集团股份有限公司 | 一种显示面板及其制备方法 |
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-
2003
- 2003-07-28 US US10/628,668 patent/US6972255B2/en not_active Expired - Lifetime
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2004
- 2004-07-13 KR KR1020067001728A patent/KR101164690B1/ko not_active Expired - Lifetime
- 2004-07-13 WO PCT/US2004/022434 patent/WO2005013320A2/en not_active Ceased
- 2004-07-13 EP EP04778107A patent/EP1652225A4/en not_active Withdrawn
- 2004-07-13 JP JP2006521869A patent/JP4677407B2/ja not_active Expired - Lifetime
- 2004-07-13 CN CNB2004800173895A patent/CN100461350C/zh not_active Expired - Lifetime
- 2004-07-19 TW TW093121522A patent/TWI348777B/zh not_active IP Right Cessation
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2005
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Also Published As
| Publication number | Publication date |
|---|---|
| US7199429B2 (en) | 2007-04-03 |
| KR20060056346A (ko) | 2006-05-24 |
| CN1809916A (zh) | 2006-07-26 |
| EP1652225A2 (en) | 2006-05-03 |
| JP2007500443A (ja) | 2007-01-11 |
| TW200520274A (en) | 2005-06-16 |
| KR101164690B1 (ko) | 2012-07-11 |
| WO2005013320A3 (en) | 2005-04-07 |
| CN100461350C (zh) | 2009-02-11 |
| US6972255B2 (en) | 2005-12-06 |
| TWI348777B (en) | 2011-09-11 |
| US20070141770A1 (en) | 2007-06-21 |
| US20050181596A1 (en) | 2005-08-18 |
| EP1652225A4 (en) | 2009-05-13 |
| WO2005013320A2 (en) | 2005-02-10 |
| US8039389B2 (en) | 2011-10-18 |
| US20050026338A1 (en) | 2005-02-03 |
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