EP3469119A4 - Engineered substrate structure for power and rf applications - Google Patents
Engineered substrate structure for power and rf applications Download PDFInfo
- Publication number
- EP3469119A4 EP3469119A4 EP17813933.3A EP17813933A EP3469119A4 EP 3469119 A4 EP3469119 A4 EP 3469119A4 EP 17813933 A EP17813933 A EP 17813933A EP 3469119 A4 EP3469119 A4 EP 3469119A4
- Authority
- EP
- European Patent Office
- Prior art keywords
- applications
- power
- substrate structure
- engineered substrate
- engineered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
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- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/14—Feed and outlet means for the gases; Modifying the flow of the reactive gases
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
- C30B25/18—Epitaxial-layer growth characterised by the substrate
- C30B25/183—Epitaxial-layer growth characterised by the substrate being provided with a buffer layer, e.g. a lattice matching layer
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- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/3003—Hydrogenation or deuterisation, e.g. using atomic hydrogen from a plasma
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
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- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
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- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/16—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular crystal structure or orientation, e.g. polycrystalline, amorphous or porous
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- H01L21/02104—Forming layers
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- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
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- H01L21/02538—Group 13/15 materials
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/20—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only AIIIBV compounds
- H01L29/2003—Nitride compounds
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US201662350077P | 2016-06-14 | 2016-06-14 | |
US201662350084P | 2016-06-14 | 2016-06-14 | |
PCT/US2017/037252 WO2017218536A1 (en) | 2016-06-14 | 2017-06-13 | Engineered substrate structure for power and rf applications |
Publications (2)
Publication Number | Publication Date |
---|---|
EP3469119A1 EP3469119A1 (en) | 2019-04-17 |
EP3469119A4 true EP3469119A4 (en) | 2020-02-26 |
Family
ID=60664230
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP17813933.3A Pending EP3469119A4 (en) | 2016-06-14 | 2017-06-13 | Engineered substrate structure for power and rf applications |
Country Status (7)
Country | Link |
---|---|
EP (1) | EP3469119A4 (en) |
JP (4) | JP6626607B2 (en) |
KR (1) | KR102361057B1 (en) |
CN (2) | CN109844184B (en) |
SG (1) | SG11201810919UA (en) |
TW (2) | TWI793755B (en) |
WO (1) | WO2017218536A1 (en) |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10297445B2 (en) | 2016-06-14 | 2019-05-21 | QROMIS, Inc. | Engineered substrate structure for power and RF applications |
EP3469119A4 (en) * | 2016-06-14 | 2020-02-26 | Qromis, Inc. | Engineered substrate structure for power and rf applications |
US10622468B2 (en) * | 2017-02-21 | 2020-04-14 | QROMIS, Inc. | RF device integrated on an engineered substrate |
US10734303B2 (en) * | 2017-11-06 | 2020-08-04 | QROMIS, Inc. | Power and RF devices implemented using an engineered substrate structure |
US10586844B2 (en) * | 2018-01-23 | 2020-03-10 | Texas Instruments Incorporated | Integrated trench capacitor formed in an epitaxial layer |
TWI692869B (en) * | 2019-05-03 | 2020-05-01 | 世界先進積體電路股份有限公司 | Substrates and methods for forming the same |
JP7319227B2 (en) | 2020-05-11 | 2023-08-01 | 信越化学工業株式会社 | BASE SUBSTRATE FOR III-V COMPOUND CRYSTAL AND METHOD FOR MANUFACTURING THE SAME |
WO2021250991A1 (en) | 2020-06-09 | 2021-12-16 | 信越化学工業株式会社 | Substrate for group-iii nitride epitaxial growth and method for producing the same |
JP2022012558A (en) | 2020-07-01 | 2022-01-17 | 信越化学工業株式会社 | Substrate for large-bore group iii nitride-based epitaxial growth, and production method thereof |
KR102446604B1 (en) * | 2021-01-04 | 2022-09-26 | 한국과학기술원 | Growth structure for strained channel, and methods for manufacturing strained channel and device using the same |
CN116848296A (en) | 2021-02-05 | 2023-10-03 | 信越半导体株式会社 | Nitride semiconductor substrate and method for manufacturing same |
JP2022131086A (en) | 2021-02-26 | 2022-09-07 | 信越半導体株式会社 | Nitride semiconductor substrate and manufacturing method for the same |
EP4306689A1 (en) * | 2021-03-10 | 2024-01-17 | Shin-Etsu Chemical Co., Ltd. | Seed substrate for epitaxial growth use and method for manufacturing same, and semiconductor substrate and method for manufacturing same |
WO2022259651A1 (en) | 2021-06-08 | 2022-12-15 | 信越半導体株式会社 | Nitride semiconductor substrate and method for producing same |
JP2023025432A (en) * | 2021-08-10 | 2023-02-22 | 信越半導体株式会社 | Nitride semiconductor substrate and method for producing the same |
WO2023047864A1 (en) * | 2021-09-21 | 2023-03-30 | 信越半導体株式会社 | Nitride semiconductor substrate and method for producing same |
WO2023063046A1 (en) * | 2021-10-15 | 2023-04-20 | 信越半導体株式会社 | Nitride semiconductor substrate and manufacturing method therefor |
JPWO2023063278A1 (en) * | 2021-10-15 | 2023-04-20 | ||
JP2023098137A (en) * | 2021-12-28 | 2023-07-10 | 信越化学工業株式会社 | Substrate for high characteristic epitaxial growth and method for manufacturing the same |
Citations (4)
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US7732301B1 (en) * | 2007-04-20 | 2010-06-08 | Pinnington Thomas Henry | Bonded intermediate substrate and method of making same |
US20120052635A1 (en) * | 2010-08-30 | 2012-03-01 | Pil-Kyu Kang | Conductive layer buried-type substrate, method of forming the conductive layer buried-type substrate, and method of fabricating semiconductor device using the conductive layer buried-type substrate |
US20130234148A1 (en) * | 2012-03-09 | 2013-09-12 | Soitec | Methods of forming semiconductor structures including iii-v semiconductor material using substrates comprising molybdenum, and structures formed by such methods |
WO2017069962A1 (en) * | 2015-10-19 | 2017-04-27 | Quora Technology, Inc. | Lift off process for chip scale package solid state devices on engineered substrate |
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US4430149A (en) * | 1981-12-30 | 1984-02-07 | Rca Corporation | Chemical vapor deposition of epitaxial silicon |
US7238595B2 (en) * | 2003-03-13 | 2007-07-03 | Asm America, Inc. | Epitaxial semiconductor deposition methods and structures |
US6972255B2 (en) * | 2003-07-28 | 2005-12-06 | Freescale Semiconductor, Inc. | Semiconductor device having an organic anti-reflective coating (ARC) and method therefor |
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Publication number | Publication date |
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TW202203473A (en) | 2022-01-16 |
EP3469119A1 (en) | 2019-04-17 |
JP7416556B2 (en) | 2024-01-17 |
JP7001660B2 (en) | 2022-01-19 |
WO2017218536A1 (en) | 2017-12-21 |
KR102361057B1 (en) | 2022-02-08 |
TWI793755B (en) | 2023-02-21 |
JP2023182643A (en) | 2023-12-26 |
SG11201810919UA (en) | 2019-01-30 |
KR20190019122A (en) | 2019-02-26 |
JP2020074399A (en) | 2020-05-14 |
JP2022058405A (en) | 2022-04-12 |
TWI743136B (en) | 2021-10-21 |
JP2019523994A (en) | 2019-08-29 |
CN109844184A (en) | 2019-06-04 |
CN114256068A (en) | 2022-03-29 |
JP6626607B2 (en) | 2019-12-25 |
CN109844184B (en) | 2021-11-30 |
TW202322418A (en) | 2023-06-01 |
TW201807839A (en) | 2018-03-01 |
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