CN100424878C - Ferroelectric film capacity used for ferroelectric memorizer and its manufacturing method - Google Patents
Ferroelectric film capacity used for ferroelectric memorizer and its manufacturing method Download PDFInfo
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- CN100424878C CN100424878C CNB2006101250870A CN200610125087A CN100424878C CN 100424878 C CN100424878 C CN 100424878C CN B2006101250870 A CNB2006101250870 A CN B2006101250870A CN 200610125087 A CN200610125087 A CN 200610125087A CN 100424878 C CN100424878 C CN 100424878C
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Abstract
The invention relates to a ferro-electricity film capacitor of ferro-electricity and relative preparation, wherein said film capacitor is formed by silicon substrate, silica dioxide baffle layer, titania adhesive layer, low electrode metal layer, low buffer layer, ferro-electricity film layer, up buffer layer, and up electrode metal layer; the adhesive layer is 10-30nm thick; the low electrode metal layer is 100nm-300nm; the low buffer layer is 5-20nm thick; the ferro-electricity is 200-500nm thick; the up buffer layer is 100-200nm thick; the up electrode metal layer is 80-150nm thick. The inventive capacitor has low fatigue speed, low drain current. The invention uses magnetic control splash method to layer-to-layer splash production, while the product has better property, with single direction.
Description
Technical field
The present invention relates to a kind of ferroelectric capacitor and preparation method thereof.
Background technology
Ferroelectric random memory (FeRAM) is compared with traditional semiconductor memory many outstanding advantages, has broad application prospects and huge economic benefit.PZT ferroelectric capacitor with metal Pt/ ferroelectric thin film/metal Pt (MFM) structure has bigger fatigue rate and relatively poor leakage current characteristic as the main storage medium of FeRAM, and directly the ferroelectric thin film crystal property for preparing on metal Pt is relatively poor, has influence on the performance of material.If directly adopt oxide electrode not only to prepare difficulty, Zhi Bei ferroelectric thin film in the above, general leakage current is bigger.[[1]Eshita?T.，FRAM?ReliabilityIssues?and?Improvement?for?Advanced?FeRAM，ISIE2005?shanghai，2005，4，23.[2]Wouters?Dirk，High?Density?FeRAM?Process?Integration，ISIF2005，shanghai，2005，4，23.[3]Masui?Shoichi，Fundamentals?ofFeRAM?Circuit?Design?Architecture?and?Device?Modeling，ISIF2005，shanghai，2005，4，23.]
Summary of the invention
The objective of the invention is to overcome above-mentioned the deficiencies in the prior art part, a kind of ferroelectric film capacity used for ferroelectric memorizer and preparation method thereof is provided, ferroelectric capacitor fatigue rate of the present invention is little, leakage current is less, ferroelectric film capacity used for ferroelectric memorizer of the present invention adopts the method sputter successively preparation of magnetron sputtering, the thin film crystallization better performances of preparation can obtain single-orientated film.
For realizing purpose of the present invention, the technical solution used in the present invention is, a kind of ferroelectric film capacity used for ferroelectric memorizer is made up of silicon base, silicon dioxide barrier layer, titanium dioxide tack coat, bottom electrode metal level, bottom breaker, ferroelectric thin film layer, last resilient coating, top electrode metal level successively; The thickness of titanium dioxide tack coat is 10～30nm; The bottom electrode metal layer thickness is 100nm～200nm; The thickness of bottom breaker is 5～20nm; The thickness of ferroelectric thin film layer is 200nm～500nm; The thickness of last resilient coating is 100nm～200nm; The top electrode metal layer thickness is 80nm～150nm; The material of bottom breaker, last resilient coating is a LSMO super large magnetic resistance material, and the material of ferroelectric thin film layer is the PZT that mixes Ta.
The thickness of described ferroelectric thin film layer is 300nm～400nm.
LSMO super large magnetic resistance material is nominal formula (La
2/3Sr
1/3) MnO
3
The PZT that mixes Ta is nominal formula Pb
1.1-1.3(Ta
0.005-0.015Zr
0.25-035Ti
0.635-0.735) O
3
A kind of method for preparing ferroelectric film capacity used for ferroelectric memorizer comprises
1. silicon base is carried out surface treatment and cleaning;
2. adopt thermal oxidation method, generate the silicon dioxide barrier layer on the silicon base surface;
3. on the silicon dioxide barrier layer, prepare the thick titanium dioxide tack coat of 10～30nm;
4. on the titanium dioxide tack coat, prepare the thick bottom electrode metal level of 100～200nm;
5. adopt solid reaction process to prepare the LSMO target;
6. use above-mentioned LSMO target, adopt magnetron sputtering method to prepare the thick bottom breaker of 5～20nm on the bottom electrode metal level, the process conditions of magnetron sputtering are: sputtering pressure 1～3Pa, sputter substrate temperature are 500 ℃～700 ℃, and sputtering atmosphere is O
2: Ar=1: 2～2: 1;
7. adopt the solid reaction process preparation to mix the PZT target of Ta;
8. use the LSMO target of the above-mentioned Ta of mixing, adopt magnetron sputtering method to prepare the thick ferroelectric thin film layer of 200～500nm on bottom breaker, the sputtering technology condition is: sputtering pressure 1.3～2.5Pa, sputter substrate temperature are 100 ℃～300 ℃, and sputtering atmosphere is an Ar gas;
9. use the above-mentioned 5. LSMO target of preparation, adopt magnetron sputtering method sputter 100～200nm on the ferroelectric thin film layer thick on resilient coating, the sputtering technology condition is: sputtering pressure 1～3Pa, sputter substrate temperature are 100 ℃～300 ℃, and sputtering atmosphere is O
2: Ar=1: 2～2: 1;
10. on last resilient coating, prepare the thick top electrode metal level of 80～150nm;
Described annealing temperature is 600 ℃～700 ℃, heat treatment time 10～30 minutes.
The present invention's advantage compared to existing technology is:
(1) ferroelectric film capacity used for ferroelectric memorizer crystal property of the present invention is good, surface compact is even, residual polarization is big, coercive field is little, and has fatigue properties preferably.
(2) ferroelectric film capacity used for ferroelectric memorizer of the present invention adopts the method sputter successively preparation of magnetron sputtering, and the thin film crystallization better performances of preparation is controlled sputtering parameter well, can obtain single-orientated film;
(3) required underlayer temperature is lower; Compatible good with integrated technique; The film that makes does not need or only needs the heat treatment of lower temperature just to have ferroelectricity.
Description of drawings
Fig. 1 is the structural representation of a kind of embodiment of ferroelectric film capacity used for ferroelectric memorizer of the present invention.
Fig. 2 is the XRD diffraction pattern of ferroelectric film capacity used for ferroelectric memorizer of the present invention.
Fig. 3 is the hysteresis of ferroelectric film capacity used for ferroelectric memorizer of the present invention figure as a result.
Fig. 4 is the fatigue properties figure of ferroelectric film capacity used for ferroelectric memorizer of the present invention.
Fig. 5 is the graph of a relation of ferroelectric film capacity used for ferroelectric memorizer of the present invention and impressed frequency.
Embodiment
By shown in Figure 1, ferroelectric film capacity used for ferroelectric memorizer of the present invention is made up of silicon base 1, silicon dioxide barrier layer 2, titanium dioxide tack coat 3, bottom electrode metal level 4, bottom breaker 5, ferroelectric thin film layer 6, last resilient coating 7, top electrode metal level 8 successively; The thickness of titanium dioxide tack coat 3 is 10～30nm; The thickness of bottom electrode metal level 4 is 100nm～200nm, and bottom electrode metal level 4 is generally platinum Pt; The thickness of bottom breaker 5 is 5～20nm; The thickness of ferroelectric thin film layer 6 is 200nm～500nm; The thickness of last resilient coating 7 is 100nm～200nm; The thickness of top electrode metal level 8 is 80nm～150nm, and top electrode metal level 8 can be platinum or aluminium; The material of bottom breaker 5, last resilient coating 7 is a LSMO super large magnetic resistance material, and can select nominal formula for use is (La
2/3Sr
1/3) MnO
3Material, select for use the LSMO of this proportioning to have conductive characteristic preferably, and its lattice constant and platinum Pt lattice constant are the most approaching, the easier perovskite resilient coating that on lower metal layer 4, grows height (111) orientation; The material of ferroelectric thin film layer 6 is the PZT that mixes Ta, and can select nominal formula for use is Pb
1.1-1.3(Ta
0.005-0.015Zr
0.25 0.35Ti
0.635-0.735) O
3Material.Select for use this proportioning to mix the PZT ferroelectric capacitor of Ta, its combination property is the application of suitable ferroelectric memory.
1 one kinds of methods that prepare ferroelectric film capacity used for ferroelectric memorizer of embodiment comprise
1. silicon base 1 is carried out surface treatment and cleaning by standard CMOS process;
2. adopt thermal oxidation method, generate the thick silicon dioxide barrier layer 2 of 150nm on silicon base 1 surface;
3. adopt magnetron sputtering method to prepare the thick titanium dioxide tack coat 3 of 20nm on silicon dioxide barrier layer 2, the process conditions of its magnetron sputtering are: sputtering pressure 1.5Pa, 200 ℃ of sputter substrate temperatures, sputtering atmosphere are O
2: Ar=1: 9;
4. adopt magnetron sputtering method to prepare the thick bottom electrode metal level Pt4 of 150nm on titanium dioxide tack coat 3, the process conditions of its magnetron sputtering are: sputtering pressure 1Pa, and 200 ℃ of sputter substrate temperatures, sputtering atmosphere are Ar gas;
5. adopt the standard solid-phase reaction method to prepare the LSMO target, LSMO super large magnetic resistance material can be nominal formula (La
2/3Sr
1/3) MnO
3, select for use to be prepared as follows technology: take by weighing high-purity La at 1/3: 1/3: 1 by stoichiometric proportion
2O
3, SrCO
3, MnCO
3Powder mixed the back ball milling 10 hours, and 1100 ℃ of pre-burnings 8 hours, ball milling 10 hours was pressed into target under the pressure of 20MP, at last in the moulding in 12 hours of 1400 ℃ of sintering;
6. adopt magnetron sputtering method to prepare the thick bottom breaker 5 of 15nm on bottom electrode metal level Pt4, the process conditions of magnetron sputtering are: sputtering pressure 2Pa, sputter substrate temperature are 600 ℃, and sputtering atmosphere is O
2: Ar=1: 1, the LSMO target that magnetron sputtering uses is above-mentioned 5. preparation;
7. adopt the preparation of standard solid-phase reaction method to mix the PZT target of Ta, the PZT that mixes Ta can be nominal formula Pb
1.2(Ta
0.01Zr
0.3Ti
0.69) O
3, select for use to be prepared as follows technology: by stoichiometric proportion 1.2: 0.005: 0.3: 0.69 takes by weighing high-purity PbO, Ta
2O
5, ZrO
2, TiO
2Powder mixed the back ball milling 10 hours, and 900 ℃ of pre-burnings 2 hours, ball milling was 10 hours again, is pressed into target under the pressure of 20MP, at last in the moulding in 2 hours of 1100 ℃ of sintering;
8. adopt magnetron sputtering method on bottom breaker 5, to prepare the thick ferroelectric thin film layer 6 of 400nm, the sputtering technology condition is: sputtering pressure 1.5Pa, the sputter substrate temperature is 200 ℃, and sputtering atmosphere is an Ar gas, and the PZT target of mixing Ta that magnetron sputtering uses is above-mentioned 7. preparation;
9. by having the mask plate of a plurality of apertures, adopt magnetron sputtering method sputter 120nm on the ferroelectric thin film layer 6 thick on resilient coating 7, its sputtering technology condition is: sputtering pressure 2Pa, sputter substrate temperature are 200 ℃, sputtering atmosphere is O
2: Ar=1: 1, the LSMO target that magnetron sputtering uses is above-mentioned 5. preparation, last resilient coating 7 is a plurality of important actors; Last resilient coating 7 also can be a plane layer;
10. adopt magnetron sputtering method at the thick top electrode metal level Pt8 of last resilient coating 7 preparation 100nm, its sputtering technology condition is: sputtering pressure 8Pa, sputter substrate temperature are 200 ℃, and sputtering atmosphere is an Ar gas;
Carry out annealing in process, make ferroelectric capacitor, its annealing process is: 650 ℃ of rapid thermal treatment 20 minutes.
The crystal property of the ferroelectric capacitor of present embodiment preparation adopts X ray to carry out analysis to measure, and analysis result is by shown in Figure 2.As can be seen from the figure, film has height (111) preferred orientation.
The electric hysteresis loop of the ferroelectric capacitor of present embodiment preparation adopts special-purpose ferroelectric tester RT66A test, and measurement result is by shown in Figure 3.As can be seen from the figure, film just reaches capacity under 5V voltage substantially, and its residual polarization reaches 50.5 μ C/cm
2, coercive voltage is 2.2V.When voltage was added to 14V, film was saturated fully, and residual polarization reaches 63.5 μ C/cm
2, coercive voltage is 2.6V.This result satisfies the desired polarization value of ferroelectric memory fully.
The fatigue properties of the ferroelectric capacitor of present embodiment preparation adopt special-purpose ferroelectric tester RT66A test, and measurement result is by shown in Figure 4, and the fatigue properties of ferroelectric capacitor are better, through 10
9After the polarization reversal, remanent polarization remains on more than 92%, compares than the fatigue properties of the pzt thin film of mixing Ta that directly prepares on the Pt electrode, obtains very big improvement.
The dielectric property of the ferroelectric capacitor of present embodiment preparation adopt the test of Agilent 4294A electric impedance analyzer, measurement result is by shown in Figure 5, as can be seen from the figure, the dielectric electric capacity of film reduces with the increase of frequency, but downward trend becomes slow behind the 1MHz.
2 one kinds of methods that prepare ferroelectric film capacity used for ferroelectric memorizer of embodiment comprise
1. silicon base 1 is carried out surface treatment and cleaning by standard CMOS process;
2. adopt thermal oxidation method, generate the thick silicon dioxide barrier layer 2 of 120nm on silicon base 1 surface;
3. adopt magnetron sputtering method to prepare the thick titanium dioxide tack coat 3 of 30nm on silicon dioxide barrier layer 2, the process conditions of its magnetron sputtering are: sputtering pressure 0.5Pa, 300 ℃ of sputter substrate temperatures, sputtering atmosphere are O
2: Ar=2: 9;
4. adopt magnetron sputtering method to prepare the thick bottom electrode metal level Pt4 of 150nm on titanium dioxide tack coat 3, the process conditions of its magnetron sputtering are: sputtering pressure 0.5Pa, and 300 ℃ of sputter substrate temperatures, sputtering atmosphere are Ar gas;
5. adopt the standard solid-phase reaction method to prepare the LSMO target, concrete preparation technology with embodiment 1 5.;
6. adopt magnetron sputtering method to prepare the thick bottom breaker 5 of 10nm on bottom electrode metal level Pt4, the process conditions of magnetron sputtering are: sputtering pressure 2Pa, sputter substrate temperature are 650 ℃, and sputtering atmosphere is O
2: Ar=1: 2, the LSMO target that magnetron sputtering uses is above-mentioned 5. preparation;
7. adopt the preparation of standard solid-phase reaction method to mix the PZT target of Ta, the PZT that mixes Ta can be nominal formula Pb
1.1(Ta
0.005Zr
0.35Ti
0.645) O
3, concrete preparation technology with embodiment 1 7.;
8. adopt magnetron sputtering method on bottom breaker 5, to prepare the thick ferroelectric thin film layer 6 of 300nm, the sputtering technology condition is: sputtering pressure 1.3Pa, the sputter substrate temperature is 300 ℃, and sputtering atmosphere is an Ar gas, and the PZT target of mixing Ta that magnetron sputtering uses is above-mentioned 7. preparation;
9. by having the mask plate of one or more apertures, adopt magnetron sputtering method sputter 100nm on the ferroelectric thin film layer 6 thick on resilient coating 7, its sputtering technology condition is: sputtering pressure 2Pa, sputter substrate temperature are 300 ℃, sputtering atmosphere is O
2: Ar=1: 2, the LSMO target that magnetron sputtering uses is above-mentioned 5. preparation;
10. adopt magnetron sputtering method at the thick top electrode metal level Pt8 of last resilient coating 7 preparation 120nm, its sputtering technology condition is: sputtering pressure 10Pa, sputter substrate temperature are 300 ℃, and sputtering atmosphere is an Ar gas;
Carry out annealing in process, make ferroelectric capacitor, its annealing process is: 600 ℃ of rapid thermal treatment 10 minutes.
3 one kinds of methods that prepare ferroelectric film capacity used for ferroelectric memorizer of embodiment comprise
1. silicon base 1 is carried out surface treatment and cleaning by standard CMOS process;
2. adopt thermal oxidation method, generate the thick silicon dioxide barrier layer 2 of 200nm on silicon base 1 surface;
3. adopt magnetron sputtering method to prepare the thick titanium dioxide tack coat 3 of 20nm on silicon dioxide barrier layer 2, the process conditions of its magnetron sputtering are: sputtering pressure 1Pa, 200 ℃ of sputter substrate temperatures, sputtering atmosphere are O
2: Ar=1: 9;
4. adopt magnetron sputtering method to prepare the thick bottom electrode metal level Pt4 of 100nm on titanium dioxide tack coat 3, the process conditions of its magnetron sputtering are: sputtering pressure 1Pa, and 200 ℃ of sputter substrate temperatures, sputtering atmosphere are Ar gas;
5. adopt the standard solid-phase reaction method to prepare the LSMO target, concrete preparation technology with embodiment 1 5.;
6. adopt magnetron sputtering method to prepare the thick bottom breaker 5 of 20nm on bottom electrode metal level Pt4, the process conditions of magnetron sputtering are: sputtering pressure 3Pa, sputter substrate temperature are 500 ℃, and sputtering atmosphere is O
2: Ar=1: 1, the LSMO target that magnetron sputtering uses is above-mentioned 5. preparation;
7. adopt the preparation of standard solid-phase reaction method to mix the PZT target of Ta, the PZT that mixes Ta can be nominal formula Pb
1.3(Ta
0.015Zr
0.25Ti
0.735) O
3, concrete preparation technology with embodiment 1 7.;
8. adopt magnetron sputtering method on bottom breaker 5, to prepare the thick ferroelectric thin film layer 6 of 500nm, the sputtering technology condition is: sputtering pressure 2.5Pa, the sputter substrate temperature is 200 ℃, and sputtering atmosphere is an Ar gas, and the PZT target of mixing Ta that magnetron sputtering uses is above-mentioned 7. preparation;
(9) by having the mask plate of one or more apertures, adopt magnetron sputtering method sputter 150nm on the ferroelectric thin film layer 6 thick on resilient coating 7, its sputtering technology condition is: sputtering pressure 3Pa, sputter substrate temperature are 200 ℃, sputtering atmosphere is O
2: Ar=1: 1, the LSMO target that magnetron sputtering uses is above-mentioned 5. preparation;
10. adopt magnetron sputtering method at the thick top electrode metal level Pt8 of last resilient coating 7 preparation 80nm, its sputtering technology condition is: sputtering pressure 6Pa, sputter substrate temperature are 200 ℃, and sputtering atmosphere is an Ar gas;
(11) carry out annealing in process, make ferroelectric capacitor, its annealing process is: 650 ℃ of rapid thermal treatment 30 minutes.
4 one kinds of methods that prepare ferroelectric film capacity used for ferroelectric memorizer of embodiment comprise
1. silicon base 1 is carried out surface treatment and cleaning by standard CMOS process;
2. adopt thermal oxidation method, generate the thick silicon dioxide barrier layer 2 of 180nm on silicon base 1 surface;
3. adopt magnetron sputtering method to prepare the thick titanium dioxide tack coat 3 of 10nm on silicon dioxide barrier layer 2, the process conditions of its magnetron sputtering are: sputtering pressure 2Pa, 100 ℃ of sputter substrate temperatures, sputtering atmosphere are O
2: Ar=1: 3;
4. adopt magnetron sputtering method to prepare the thick bottom electrode metal level Pt4 of 200nm on titanium dioxide tack coat 3, the process conditions of its magnetron sputtering are: sputtering pressure 1.5Pa, and 100 ℃ of sputter substrate temperatures, sputtering atmosphere are Ar gas;
5. adopt the standard solid-phase reaction method to prepare the LSMO target, concrete preparation technology with embodiment 1 5.;
6. adopt magnetron sputtering method to prepare the thick bottom breaker 5 of 5nm on bottom electrode metal level Pt4, the process conditions of magnetron sputtering are: sputtering pressure 1Pa, sputter substrate temperature are 700 ℃, and sputtering atmosphere is O
2: Ar=2: 1, the LSMO target that magnetron sputtering uses is above-mentioned 5. preparation;
7. adopt the preparation of standard solid-phase reaction method to mix the PZT target of Ta, the PZT that mixes Ta can be nominal formula Pb
1.2(Ta
0.015Zr
0.35Ti
0.635) O
3, concrete preparation technology with embodiment 1 7.;
8. adopt magnetron sputtering method to prepare the thick ferroelectric thin film layer 6 of 200nm on bottom breaker 5, the sputtering technology condition is: sputtering pressure 2Pa, sputter substrate temperature are 100 ℃, and sputtering atmosphere is an Ar gas, and the PZT target of mixing Ta that magnetron sputtering uses is above-mentioned 7. preparation;
9. by having the mask plate of one or more apertures, adopt magnetron sputtering method sputter 200nm on the ferroelectric thin film layer 6 thick on resilient coating 7, its sputtering technology condition is: sputtering pressure 1Pa, sputter substrate temperature are 100 ℃, sputtering atmosphere is O
2: Ar=2: 1, the LSMO target that magnetron sputtering uses is above-mentioned 5. preparation;
10. adopt magnetron sputtering method at the thick top electrode metal level Pt8 of last resilient coating 7 preparation 150nm, its sputtering technology condition is: sputtering pressure 8Pa, sputter substrate temperature are 100 ℃, and sputtering atmosphere is an Ar gas;
Claims (6)
1. a ferroelectric film capacity used for ferroelectric memorizer is characterized in that: be made up of silicon base (1), silicon dioxide barrier layer (2), titanium dioxide tack coat (3), bottom electrode metal level (4), bottom breaker (5), ferroelectric thin film layer (6), last resilient coating (7), top electrode metal level (8) successively;
The thickness of titanium dioxide tack coat (3) is 10～30nm; The thickness of bottom electrode metal level (4) is 100nm～200nm; The thickness of bottom breaker (5) is 5～20nm; The thickness of ferroelectric thin film layer (6) is 200nm～500nm; The thickness of last resilient coating (7) is 100nm～200nm; The thickness of top electrode metal level (8) is 80nm～150nm;
The material of bottom breaker (5), last resilient coating (7) is a LSMO super large magnetic resistance material, and LSMO super large magnetic resistance material is structural chemistry formula (La
2/3Sr
1/3) MnO
3, the material of ferroelectric thin film layer (6) is the PZT that mixes Ta.
2. a ferroelectric film capacity used for ferroelectric memorizer is characterized in that: be made up of silicon base (1), silicon dioxide barrier layer (2), titanium dioxide tack coat (3), bottom electrode metal level (4), bottom breaker (5), ferroelectric thin film layer (6), last resilient coating (7), top electrode metal level (8) successively;
The thickness of titanium dioxide tack coat (3) is 10～30nm; The thickness of bottom electrode metal level (4) is 100nm～200nm; The thickness of bottom breaker (5) is 5～20nm; The thickness of ferroelectric thin film layer (6) is 200nm～500nm; The thickness of last resilient coating (7) is 100nm～200nm; The thickness of top electrode metal level (8) is 80nm～150nm;
The material of bottom breaker (5), last resilient coating (7) is a LSMO super large magnetic resistance material, and the material of ferroelectric thin film layer (6) is the PZT that mixes Ta, and the PZT that mixes Ta is structural chemistry formula Pb
1.1-1.3(Ta
0.005 -0.015Zr
0.25-0.35Ti
0.635-0.735) O
3
3. ferroelectric film capacity used for ferroelectric memorizer according to claim 1 is characterized in that: the PZT that mixes Ta is structural chemistry formula Pb
1.1-1.3(Ta
0.005-0.015Zr
0.25-0.35Ti
0.635-0.735) O
3
4. ferroelectric film capacity used for ferroelectric memorizer according to claim 1 and 2 is characterized in that: the thickness of described ferroelectric thin film layer (6) is 300nm～400nm.
5. a method for preparing claim 1 or 2 described ferroelectric film capacity used for ferroelectric memorizer is characterized in that, comprises
1. silicon base is carried out surface treatment and cleaning;
2. adopt thermal oxidation method, generate silicon dioxide barrier layer (2) on silicon base (1) surface;
3. go up the thick titanium dioxide tack coat (3) of preparation 10～30nm in silicon dioxide barrier layer (2);
4. go up the thick bottom electrode metal level (4) of preparation 100～200nm at titanium dioxide tack coat (3);
5. adopt solid reaction process to prepare the LSMO target;
6. use above-mentioned LSMO target, adopt magnetron sputtering method to go up the thick bottom breaker (5) of preparation 5～20nm at bottom electrode metal level (4), the process conditions of magnetron sputtering are: sputtering pressure 1～3Pa, sputter substrate temperature are 500 ℃～700 ℃, and sputtering atmosphere is O
2: Ar=1: 2～2: 1;
7. adopt the solid reaction process preparation to mix the PZT target of Ta;
8. use the PZT target of the above-mentioned Ta of mixing, adopt magnetron sputtering method to go up the thick ferroelectric thin film layer (6) of preparation 200～500nm at bottom breaker (5), the sputtering technology condition is: sputtering pressure 1.3～2.5Pa, sputter substrate temperature are 100 ℃～300 ℃, and sputtering atmosphere is an Ar gas;
9. use the above-mentioned 5. LSMO target of preparation, adopt magnetron sputtering method to go up the thick last resilient coating (7) of sputter 100～200nm in ferroelectric thin film layer (6), the sputtering technology condition is: sputtering pressure 1～3Pa, sputter substrate temperature are 100 ℃～300 ℃, and sputtering atmosphere is O
2: Ar=1: 2～2: 1;
10. go up the thick top electrode metal level (8) of preparation 80～150nm at last resilient coating (7);
6. the method for preparing ferroelectric film capacity used for ferroelectric memorizer according to claim 5 is characterized in that: described annealing temperature is 600 ℃～700 ℃, heat treatment time 10～30 minutes.
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| CN102255045A (en) * | 2011-09-20 | 2011-11-23 | 桂林电子科技大学 | MgxZn1-xO electrically induced resistance change film and preparation method of asymmetrical structure heterojunction thereof |
| US9322994B2 (en) | 2011-12-27 | 2016-04-26 | Colorchip (Israel) Ltd. | Planar lightwave circuit and a method for its manufacture |
| US10297445B2 (en) | 2016-06-14 | 2019-05-21 | QROMIS, Inc. | Engineered substrate structure for power and RF applications |
| JP6626607B2 (en) * | 2016-06-14 | 2019-12-25 | クロミス，インコーポレイテッド | Designed substrate structures for power and RF applications |
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| CN1329750A (en) * | 1998-10-13 | 2002-01-02 | 塞姆特里克斯公司 | Low imprint ferroelectric material for long retention memory and method of making the same |
| US20020000594A1 (en) * | 2000-06-30 | 2002-01-03 | Eun-Seok Choi | Method for fabricating semicondutor memory device |
| US6489645B1 (en) * | 2001-07-03 | 2002-12-03 | Matsushita Electric Industrial Co., Ltd. | Integrated circuit device including a layered superlattice material with an interface buffer layer |
| CN1995006A (en) * | 2006-12-28 | 2007-07-11 | 复旦大学 | (2-alkoxy-4-oxo)-penta-2-enoate compound preparation method |
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|---|---|---|---|---|
| CN1329750A (en) * | 1998-10-13 | 2002-01-02 | 塞姆特里克斯公司 | Low imprint ferroelectric material for long retention memory and method of making the same |
| US20020000594A1 (en) * | 2000-06-30 | 2002-01-03 | Eun-Seok Choi | Method for fabricating semicondutor memory device |
| US6489645B1 (en) * | 2001-07-03 | 2002-12-03 | Matsushita Electric Industrial Co., Ltd. | Integrated circuit device including a layered superlattice material with an interface buffer layer |
| CN1995006A (en) * | 2006-12-28 | 2007-07-11 | 复旦大学 | (2-alkoxy-4-oxo)-penta-2-enoate compound preparation method |
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