CN1319256A - Ferroelectric thin film of reduced tetragonality - Google Patents

Ferroelectric thin film of reduced tetragonality Download PDF

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CN1319256A
CN1319256A CN99811267A CN99811267A CN1319256A CN 1319256 A CN1319256 A CN 1319256A CN 99811267 A CN99811267 A CN 99811267A CN 99811267 A CN99811267 A CN 99811267A CN 1319256 A CN1319256 A CN 1319256A
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ferroelectric
electrode
cell
ferroelectric layer
tetragonality
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R·拉梅什
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University of Maryland at Baltimore
Iconectiv LLC
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Telcordia Technologies Inc
University of Maryland at Baltimore
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    • HELECTRICITY
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
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    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/516Insulating materials associated therewith with at least one ferroelectric layer
    • HELECTRICITY
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/105Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration including field-effect components
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    • H01ELECTRIC ELEMENTS
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    • H01L21/02172Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02197Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides the material having a perovskite structure, e.g. BaTiO3
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    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/55Capacitors with a dielectric comprising a perovskite structure material
    • H01L28/56Capacitors with a dielectric comprising a perovskite structure material the dielectric comprising two or more layers, e.g. comprising buffer layers, seed layers, gradient layers

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Abstract

A ferroelectric material, especially as incorporated into a crystallographically oriented epitaxial ferroelectric cell, of Pb1-xLaxZryTi1-yO3 or Pb1-xNbxZryTi1-yO3 having a moderately high La or Nb content such that the unit cell is less tetragonal, that is, more nearly cubic, so as to reduce stress effects. A most preferred value of the c/a constant is about 1.01. Exemplary compositional ranges for x are 6 to 20 % for La and 3 to 15 % for Nb, when y is 20 %. The reduced polarizabilities voltages are consistent with integrated ferrroelectric memories operating at 3.0V and lower.

Description

Reduce the ferroelectric thin film of tetragonality
Invention field
The present invention relates generally to perovskite material.The present invention be more particularly directed to can be used for the ferroelectric material of ferroelectric storage cell.
Background technology
Because the no energy requirement of ferroelectric random-access memory (FRAMs) keeps the extra electric field polarized state, so the nonvolatile storage of silicon instead.Fig. 1 shows the schematic universal architecture of FRAM 10, and has comprised two condenser armatures 12,14 of placing ferroelectric material body 16 therebetween.Ferroelectric material 16 not only has basically the dielectric constant greater than 1, and under proper condition, ferroelectricity is bistable.In case condenser armature 12,14 makes ferroelectric 16 enter up or down polarized state, is still kept this state even polarizing voltage removes it.That is, electric charge (or voltage) still remains on the unit 10 and need not to charge simultaneously.Later, electric charge can be measured comes out.Therefore FRAM 10 has constituted nonvolatile storage.
Generally speaking, FRAM comprises the polycrystalline ferroelectric material that is clamped between interior two metal electrodes of capacitor arrangement.But this structure exists reliability and life problems.
Recently, Ramesh and partner thereof have developed the polycrystalline orientation ferroelectric cell of utilizing metal oxide electrode.The U.S. Patent application No.08/578 that people such as Dhote submitted in December 26 nineteen ninety-five has disclosed platinum base bottom electrode in 499 (open as PCT publication 97/23886 on July 3rd, 1997).
The profile of Fig. 2 illustrated people such as Dhote that disclose with the exemplary construction similar ferroelectric random-access memory of silicon dynamic ram (FRAM) 20.Be understandable that this FRAM structure is repeatedly duplicated to form bigger FRAM integrated circuit and need form other on same chip supports circuit.Whole FRAM structure is except indivedual parts, and other all are known and have been disclosed by Ramesh in aforesaid U.S. Patent and application.Kinney is at integrated ferroelectric body vol.4, and 1994, in " signal in the high density ferroelectric memory amplifies " literary composition on the pp.131-144 FRAM integrated circuit has been done good general introduction.FRAM 20 is formed at (001) thereby can be easily on the monocrystalline substrate 22 of orientation gets on other silicon circuits are integrated.By making opposite diffuse dopants of conduction type and substrate 22 or implant source polar region or drain region 24,26 form metal-oxide semiconductor (MOS) (MOS) triodes.The grid structure 28 of gate oxide and last metal (for example aluminium) gate line was with the control grid under stack comprised on the middle gate regions.
For example first inner layer dielectric layer 30 of silicon dioxide is deposited on substrate 22 and the transistor arrangement.Touch first inner layer dielectric layer 30 of hole 32 on photoengraving process source area 24, and in the hole, fill polysilicon to be formed up to the polysilicon contact plug (plug) of transistor source 24.Source metal polar curve 34 through photoengraving on first inner layer dielectric layer 30, form pattern and with polysilicon plug 32 electric contacts.
Subsequently, second inner layer dielectric layer 36 is deposited on first inner layer dielectric layer 30.Another touches the aperture etching by first and second inner layer dielectric layers 30,36 on the drain region 26, and polysilicon is packed into and touches the hole to form and the contacting of transistor drain 26.Technology so far is the unusual technology of standard in the silicon technology.
Deposit subsequently and delimitation lift-off mask form window to touch on the hole 38 in drain electrode, except the capacitor that most of regional still letter is a required size (though in commerce is made, generally adopting the mask dry plasma).Deposit series of layers on mask and in the window.Polysilicon layer 40 has good electric the contact with polysilicon plug 38.Conductive isolation layer between the metal oxide contact of TiN layer 42 and platinum layer 44 formation polysilicons and oxidation.Polysilicon has semiconductor property, if but surface oxidation is a silicon dioxide, then form stable insulating barrier, hindered electric contact.Deposit is conductive metal oxide layer 46 on platinum layer 44, though can adopt other metal oxides, reasonable is perovskite, for example lanthana strontium cobalt (LSCO), particularly laminated perovskite.The approximate composition of this material is La 1-xSr xCoO 3, 0.15≤x≤0.85 wherein, but the nominal composition is La 0.5Sr 0.5CoO 3LSCO is acknowledged as and can constitutes gratifying electric contact, and promotes the height-oriented growth of perovskite ferroelectric materials.
Peel off photomask subsequently, stay following accumulation horizon shown in Figure 2 40,42,44 and 46.Delimit another photomask subsequently, make Z-shaped field oxide layer 48 deposit conformally at the following accumulation horizon edge that covers aforementioned delimitation, its edge is in the top surface edge extension of accumulation horizon down, and its root stretches out from following accumulation horizon bottom, still reserves center window for the last ferroelectric rack lamination after the deposit.Field oxide layer 48 makes the marginal portion insulation of ferroelectric after the deposit and bottom electrode.
In the past, field oxide layer 48 is by SiO 2Or TiO 2Constitute, but the two is not a desirable material.When perovskite ferroelectric electrodeposition is on these materials, generally can form perovskite and microlite mixing phase mutually, their etching degree varies causes etching unreliable.Better field oxide layer 48 is that (stoichiometric proportion is about Bi to bismuth titanates 4Ti 3O 12), it is that a kind of perovskite and growth course are identical with other calcium titanium ore bed.Ramesh is at United States Patent (USP) 5,248, discloses Bi in 564 4Ti 3O 12The perovskite that promotes the crystal orientation to learn orientation grown on non-orientation substrate played powerful template layer effect, so Bi 4Ti 3O 12Field oxide layer 48 has been guaranteed the growth of high-quality ferroelectric on substrate.Other perovskite materials can replace bismuth titanates so long as not (for example not the having ferroelectricity) less with dielectric constant that be difficult to conduct electricity.For the template that realizes that effect is best, the Bi of perovskite form 4Ti 3O 12Should have layer structure, promptly c axialite lattice are the twice of a and b axle at least.
After field oxide 48 forms, deposit and delimit another mask, it comprises around the window of time accumulation horizon 40,42,44 and 46, except the root 49 of its peripheral part imbrication in field oxide layer 48.Subsequently, deposit ferroelectric layer 50 under the condition that helps the crystal orientation growth.Reasonable is that ferroelectric layer 50 comprises load lanthanium titanate zirconium (PNZT).The perovskite ferroelectric layer can be deposited under the low relatively temperature on LSCO or other the similar perovskite conductive electrodes, but degree of crystallinity is still better.Deposit on the ferroelectric layer 50 be on conductive metal oxide layer 52, relatively good is that following conductive metal oxide layer 44 with perovskite (for example LSCO) forms symmetrically.Last platinum layer 54 is deposited on the conductive metal oxide layer 52.These layer 54 no strict process need to consider, and select the platinum composition as just a kind of phase transformation scheme.Estimate that its composition will become TiW or other metal coatings that generally uses in silicon technology.After the platinum layer 54, photomask is stripped from deposit, stays last accumulation horizon structure shown in Figure 2.
The 3rd inner layer dielectric layer 56 be deposited with etching to cover the ferroelectric rack lamination.It is not inner layer dielectric layer that this layer 56 more likes one deck passivation layer non-.
By with three inner layer dielectric layer 56 of through hole 60 etchings, make deposit 54 electric contacts with depicting subsequently with the Ti/W plug 60 electric Al system metal capacitor lines 62 that contact with Ti/W filling vias 60 through covering ferroelectric rack lamination.
People such as Dhote find, platinum layer 44 can make ferroelectric rack lamination (metal oxide layer of ferroelectric and two-layer clamping) hold (thermal budget) deposit down in that higher heat is pre-under deposit under 500~550 ℃ the higher temperature, and heat is pre-to be held and be defined as temperature (measurement unit for ℃) to the integration of sample in this following time of temperature.(be PNZT layer 50, go up LSCO electrode 52 and last Pt layer 54) generally deposit in same cavity under a temperature because three layers is so heat pre-appearance is deposition temperature and the total product of deposition time.
PNZT is well-known ferroelectric material.The PNZT composition that people such as Dhote provide in particular instance is Pb 0.04Nb 0.18Zr 0.78TiO 3And PbNb 0.04Zr 0.28Ti 0.68O 3, promptly PNZT is poor lead on the one hand, perhaps is rich lead and rich zirconium on the other hand.
The problem that needs to solve in any kind ferroelectric memory is fatigue behaviour.Usually can observe, through after a large amount of read-writes, the ferroelectric or polarization property of ferroelectric cell can be degenerated.The polycrystallization unit is subjected to tired influence very big and the crystal orientation orientation unit has much bigger fatigue resistance.Yet fatigue still is considered to the problem that the crystal orientation orientation unit also exists.
In order to quantize tired and other operating characteristic in the ferroelectric cell, need understand the polarization characteristic of ferroelectric cell.Fig. 3 shows ferroelectric hysteresis loop 64.Trunnion axis is represented the voltage on the unit.Vertical axis is represented the polarization (no matter being (remaining) that applies immediately or do not have remnants when applying voltage) of material.Polarization is proportional to the integration of the electric charge of inflow or outlet unit to the time.B-H loop is highly nonlinear.For the discussion here, suppose that characteristic is symmetrical (though not being so usually) under actual conditions.
Shown in B-H loop show, along with applying voltage progressively near saturation voltage V Sat, B-H loop is near maximum polarization P SatBut polarity adjustment (poling) mostly just arrives V along voltage direction Max, the P of generation MaxOnly be P Sat90%.Polar modulation is to  V MaxPolarization difference P *Expression, promptly for the B-H loop of symmetry, P *=2P MaxWhen the unit is pressed to V MaxThe time, correspondingly be polarized to P Max, when still voltage drop is low to moderate V=0 subsequently, still keep residual polarization P rIf the unit is polarized to negative polarity, then keep negative residual polarization, for the B-H loop of symmetry be-P rSuppose that applying voltage be V MaxThe time positive polarity under finish and read, then the polarization P that do not switch of the electric charge correspondence that records after the polarization or the polarization P of switching *Read circuit and must be able to distinguish difference between them, be i.e. pulsation polarization Δ P=P *-P.For the B-H loop of symmetry, pulsation polarization Δ P equals 2P r
Generally speaking, in order to obtain outstanding performance, B-H loop should be as far as possible near rectangle.That is, for given V Max, coercive voltage V cShould be maximum.This is because consider residual polarization P rShould increase greatly and with coercive voltage as much as possible.But thinking, we also to consider some compensation.
Consideration on the other hand is, if ferroelectric memory is wanted commercialization, then must with other silicon integrated circuit compatibilities of for example in personal computer, computer workstation and other computer control are used, using.For many years, be used for the logic or the digital silicon integrated circuit of storage all with 5 volts of direct voltage V CcPower supply.But in recent years, advanced integrated circuit is in design with lower power voltage supply, for example 3.0 volts of direct currents, 2.3 volts of direct currents and 1.8 volts of direct currents.The reduction of voltage had both reduced the problem of ultra-high capacity integrated circuit aspect heat radiation, had prolonged the operating time of portable computer battery again.
The circuit diagram of Fig. 4 shows the key that links to each other with ferroelectric cell 10 and reads practical circuit.This embodiment appears in people's such as Kinney the description.Other circuit of equal value also are feasible.Link to each other with each ferroelectric cell 10 be in the corresponding diagram 2 MOS transistor 23 read transistor 66.Word line 68 control storage unit 10 list reads transistor 66, but along the direction perpendicular to active line 68.Read transistor 66 and ferroelectric cell 10 is selected to be connected to the bit line 70 that is connected with memory cell 10 row equally.That is, word line 68 and bit line 70 are arranged on the rectangular array of memory cell 10 in vertical direction.Because the hysteresis effect of ferroelectric material need apply bias voltage by the anode line through being parallel to word line 68 72 selectively on ferroelectric cell 10 other electrodes in reading process.
In reading process, ferroelectric cell 10 temporarily is connected with bit line 70, and is stored in the electric charge on the unit 10 no matter be in the positive or negative polarity state, is all shared by the bigger parasitic capacitance that connects bit line 70, thereby produce two kinds of possible voltages on bit line 70.Detecting amplifier 76 subsequently this voltage and the reference voltage that is stored in the electric charge reflection on the reference capacitor 78 are compared and incoming line 79 on detecting amplifier 76.Detecting amplifier 76 output digital signal OUT, the state of charge of its expression ferroelectric storage unit 10.
Generally speaking, reference capacitor 78 is to read in the circulation parasitic capacitance that the additional bit line BL79 of usefulness not links to each other with current.Detecting amplifier 76 modal implementations are cross-couplings bi-stable latch circuit, just latch in the two states one of them according to the voltage on two incoming lines 70,79.Therefore the voltage on reference capacitor 78 or the continuous bit line 79 need be set between complementary state and activate between the complementary voltage of induction on the bit line 70 by ferroelectric cell 10.Above-mentioned all operations comprises precharge and discharge by logical circuit 80 controls, and this circuit has ground connection and direct current supply voltage V CcTwo kinds of power supply inputs.If therefore ban use of complicated voltage multiplying circuit, then all operations in the memory circuitry all is confined to peak to peak V CcOn.
But many ferroelectric memorys are according to 5 volts of direct current supply voltage V CcDesign.As common but nisi rule, for the ferroelectric condenser memory cell, the polar voltages V that applies MaxBe limited to approximately less than supply power voltage V Cc1/2.Generally by finishing reading of ferroelectric cell divided by the electric charge that is stored on the ferroelectric condenser with the big electric capacity that connects bit line.Because this voltage drop and read with write circuit in other losses of voltage on the various capacitors, V MaxOr V SatGenerally be coercive voltage V c5 times.Under any circumstance, low coercive voltage V cCorresponding low saturation voltage V SatSuppose supply power voltage V CcBe 1.8 volts of direct currents, then coercive voltage V cNeed reach 0.5~0.6 volt of direct current, amount of switched is 0.9 volt of direct current.Generally speaking, if coercive voltage V cLower, saturation voltage V then SatAlso lower.
In theory, because ferroelectric effect depends on the electric field (electromotive force that promptly applies is divided by ferroelectric layer thickness) that applies, therefore reduce the interior ferroelectric layer thickness of ferroelectric cell simply and just can reduce the voltage power supply scope.So V cAnd V MaxTo reduce with ferroelectric layer thickness.But present ferroelectric material electrical insulator no all roses, and big inadequately conductivity will hinder ferroelectric cell to work in real system.Problem is linear, promptly is not the jump ohmic properties cause of electronics quantum for example.Therefore, the less increase of local effective electric field may cause electric current to increase considerably.These effects have been brought generally accepted restriction, and promptly the minimum thickness of ferroelectric layer is 0.23 micron or at least less than 0.15 micron.Under less thickness, the leakage current on the ferroelectric is with surplus.As the result of minimum thickness, the voltage that applies on the ferroelectric layer must be greater than the minimum value that produces the suitable capacitance charge storage.
For such as PZT (PbZrTiO 3), PLZT (PbLaZrTiO 3) and the simple ferrous electric material of other well-known materials and so on, the physical characteristic of ferroelectric cell is considered to follow mechanism shown in Figure 5.With regard to PLZT, PbZrO 3, PbTiO 3, LaZrO 3And LaNbO 3Preceding 3 kinds of materials have optkmal characteristics in the alloy cpd.For PNZT (PbNbZrTiO 3) also should have similar characteristic.The structure cell unit of these materials is normally dimetric, the rectangular element that promptly has 3 vertical unit vectors, and one is a for two other equivalence of c.For most ferroelectric material, c is greater than a.The ratio of c/a is defined as the tetragonality factor of ferroelectric material.The structure cell unit comprises that the rare earth atom 82 of eight lead (Pb), lanthanum (La) or the niobium (Nb) that are positioned on the angle, six oxygen (O) atoms 84 that are positioned at six rectangular surfaces middle parts and one are usually located at titanium (Ti), the zirconium cation atom such as (Zr) of tetragonal unit central authorities.But under Curie temperature, low-yield cation-bit on one of them unit central authorities of deviation post 86a, 86b or under.The displacement of the relative unit of cation central authorities causes the bistable state ferroelectricity.Cation-bit which in two deviation post 86a, 86b determined the polarized state of unit.
Need utilize the known characteristic of ferroelectric storage unit, merits and demerits design to be particularly conducive to the unit of operating on low voltage.
Summary of the invention
The present invention may be summarized to be a kind of ferroelectric condenser unit, and it is included in the ferroelectric layer of the crystal orientation orientation that forms on the metal oxide electrode layer.What ferroelectric material was selected is the less composition of the tetragonality factor, and promptly for tetragonal perovskite, c/a's is smaller.Particularly, the tetragonality factor can be represented the composition of complicated ferroelectric alloy, and its ferroelectric properties is not so good as to optimize.Yet because the tetragonality factor is more little, stress is more little, so ferroelectric cell has fatigue properties preferably, and the preferable characteristic that under the used voltage of big capacity integrated memory, perhaps can not polarize out.Verified effect in plumbous lanthanum zirconium titanium (PLZT) and plumbous niobium zirconium titanium (PNZT).
The accompanying drawing summary
Fig. 1 is the schematic diagram of ferroelectric storage cell.
Fig. 2 is for using the profile of ferroelectric storage unit of the present invention.
Fig. 3 is the important ferroelectric parametric plot of ferroelectric cell.
Fig. 4 is a circuit diagram, shows the read that links to each other with ferroelectric storage unit.
Fig. 5 is the quadrature schematic diagram of ferroelectric material crystal structure such as PZT, PLZT and other perovskites.
Fig. 6 is two kinds of hysteresis graphs under the plumbous lanthanum zirconium composition.
Fig. 7 is the hysteresis graph under the PLZT composition opposed polarity voltage of the present invention.
Fig. 8 is the hysteresis graph of three kinds of plumbous niobium zirconium compositions.
Fig. 9 is that PNZT unit pole switching turns curve chart for the polar voltages function under three kinds of content of niobium.
Figure 10 is the curve chart of the coercive voltage of three kinds of PNZT unit as the polar voltages function.
Figure 11 is that the bipolar pole switching of three kinds of PNZT unit turns the curve chart for the times of fatigue function into.
The preferred mode that carries out an invention
My conclusion part promptly thinks that with prior art the viewpoint that coercive voltage should be high as far as possible is opposite based on some considerations in the background parts, for advanced person's ferroelectric integrated circuit, and coercive voltage V cWith maximum working voltage V MaxShould be greater than the high numerical value of acceptable.
The advantage that the present invention attempts to utilize following opposition to consider, promptly help ferroelectric property but the bigger tetragonality that is unfavorable for fatigue properties be unfavorable for ferroelectric property but help fatigue properties and low-work voltage cross high working voltage and less tetragonality.
The c/a factor of ferroelectric material shown in Figure 5 has mainly implied ferroelectric behavior and fatigue properties.The ratio of less c/a means that bigger ratio causes bigger unit tetragonality near cubic symmetry more in the structure cell unit.Generally speaking, as maximum polarization P MaxWith residual polarization P rShown in, the ratio of c/a is big more, and the material polarization is also big more.It is evident that the ratio generation of bigger c/a more near the hysteresis loop 70 of rectangle, therefore causes bigger coercive voltage V cBut as previously mentioned, always do not need bigger coercive voltage V c
It is evident that the comparison fatigue properties of bigger c/a also have contribution and can further reduce the squareness of magnetic hysteresis.These perovskite materials are almost always grown on Curie temperature, and therefore the material of growth has the cubic lattice structure that single crystal lattice length is a '.In the required crystal orientation oriented material of advanced ferroelectric integrated circuit, cubic material is to a certain extent with following relatively template layer (for example LSCO) oriented growth of extensional mode.Along with material cooled to Curie temperature, material is converted to the tetragonal of Fig. 5.Ignore away from the thermal expansion effects under the phase transition temperature, along with the cooling of material in phase transformation, lattice constant is reduced to a along both direction from a, and increases to c from a ' on other direction.Yet new cubic material still holdfast is not experiencing on the substrate of phase transformation.Therefore phase transition process applies a large amount of stress in ferroelectric material, and particularly at template layer at the interface, and for the ratio of bigger c/a, stress is also bigger.This bigger stress is estimated to impel to the contributive several mechanism of fatigue and to crystal orientation orientation ferroelectric structure and is exerted an influence.It should be noted that in the polycrystalline ferroelectric of prior art there is not former subtemplate, and cubic crystallization can be held lattice mismatch much bigger on the crystal plane.Therefore particularly for the cubic perovskite of crystal orientation orientation, the ratio of bigger c/a mean may make tired sharply increase bring out stress in a large number.The ratio of bigger c/a also is considered to and will causes iron electric polarization to switch more slowly.
Second kind of effect is that the tetragonal of material has three kinds of possible orientations when being lower than Curie temperature when being cooled to from growth temperature.The structure of Fig. 5 is based on general preferred orientation, and its c axle is perpendicular to the plane of template layer.This is called the c domain.But under local yardstick, one of them in two a axles may be perpendicular to template layer, and the c axle is positioned at the plane.These are oriented to a domain.Two the different orientation zones that co-exist in of a and c orientation produce 90 ° of domain walls.The c domain is a preferential growth uniformly, and a domain is annealed to the orientation of contiguous c domain usually and forms bigger domain.But if the c/a value is bigger, then the more any annealing under the low temperature will comprise the obvious distortion of existing relatively crystal structure, though and help phase transformation and be difficult to activate.Be multiple orientation be can be in metastable.People such as Song are at " ferroelectric (PB, La) (Zr, Ti) O 3The activation field of capacitor " (no15, has done explanation to this effect in pp.2211-2213) in October, 1997 for applicating physical communication, vol.71.
And the switching of the domain that polarizes is finally depended in the work of ferroelectric cell.Well-knownly being, and is comparing of 180 ° of domain walls only, and switch the higher field of ferroelectric needs that comprises a plurality of domains (being 90 ° of domain walls) between domain.Therefore need to suppress to be oriented to the multiple orientation that the c domain causes in the main ferroelectric crystal with the c axle.
Consider that according to these we think that now the ferroelectric integrated circuit that is operated in low voltage should comprise the ferroelectric material that tetragonality is less, the ratio of the c/a that promptly reduces (though be greater than unit 1 numerical value).The ratio of c/a can be expressed as that a shaft lattice constant on the both direction equates or near the tetragonality factor of the material that equates.Though the ratio of lower c/a may make polarity effect degenerate, and remains pretty good.Simultaneously, because stress reduces, fatigue properties improve.And this material is considered to the easier material that is annealed to complete c axle orientation.And the little ferroelectric cell of tetragonality is estimated easier switching.That is, switch speed improves.
According to following experiment, I think that the ratio of about 1.01 c/a is best, and am decreased at 1.005 o'clock in the tetragonality factor and have obtained useful result.
A preferable class ferroelectric material is PLZT, i.e. Pb 1-xLa xZr yTi 1-yMore brief expression for example is 7/65/35, here x=75%, y=65% and 1-y=35%.Therefore be expressed as x/y/1-y.Generally speaking, because tetragonality reduces,, bigger x value helps crystal mass so having reduced ferroelectric effect.The x value is used as electro-optical device up to about 65% PLZT, but the material under these x is non-tetragonality.I think that in order to reduce operating voltage, the La content x of PLZT should be between 6~12%.
Ramesh is at United States Patent (USP) 5,270, and an example that proposes in 298 comprises a kind of ferroelectric cell structure, and its PLZT composition is x=10%, y=20%, promptly 10/20/80.It should be noted that the application of quoting adopts different x and the definition of y.According to the method for cited application, two kinds of capacitor arrangement prototypes have been made.A kind of composition is (0/20/80) and another kind of be (10/20/80), and promptly x equals 0% and 10% respectively.Table 1 has provided the crystal orientation parameter of these material films.People such as Yang are at " Pb (Zr, Ti) O 3The low-pressure performance of capacitor " (no25, has reported similar result in pp.3578-3580) in December, 1997 for applicating physical communication, vol.71.
x(%) c(nm) a(nm) c/a
0 0.411 0.395 1.034
0 0.410 0.396 1.030
10 0.4025 0.396 1.016
Table 1
Measured the pulsation B-H loop for two kinds of samples.The results are shown among Fig. 6.The very square characteristic that PZT sample (x=0) in the loop 90 illustrates, and the PLZT sample of loop 92 interior=10% shows poor slightly square characteristic.The follow-up measurement of the B-H loop that the PLZT capacitor of x=0.3 is done shows that the result is in the middle of Fig. 6 curve.
X=0,1 PLZT sample is tested under a plurality of pulsation polarizing voltages.Fig. 7 shows hysteresis loop: loop 94 corresponding 5 volts of polarization; Loop 96 corresponding 2.3 volts of polarization; And loop 98 corresponding 2 volts of polarization.For the PLZT sample of x=0.1, the saturated polarization under 5 volts is 35 μ C/cm 2About, and coercive voltage V cAll greater than about 0.6 volt.
The PLZT capacitor of x=0.1 has been done testing fatigue under room temperature and 100 ℃.Tired and test pulse all is 2 volts.Sample shows until 10 11The inferior fatigue that all occurs basically.The preferable initial polarization ability of doing for the PLZT capacitor of x=0.03 of test shows, but 10 9Inferior above fatigue is decreased to polarizability to be lower than the PLZT of x=0.1.
As mentioned above, because that a situation arises on a axialite farmland is less, so the high ferroelectric material switching capability of lanthanum content is lower than the low content ferroelectric material of strong polarization.In the unit of work, this helps switching with short pulsewidth, is important for the ferroelectric memory that is far smaller than 1 microsecond switching (for example pulsewidth was 100 nanoseconds) in the computer system.Experimental result can not directly be used for comparing between the unit of the similar manufacturing of ferroelectric of different tetragonalities.But pulse width measure shows, because the tetragonality factor of PLZT is less than PZT, so the PLZT capacitor is being shorter than the PZT capacitor than the changeable polarization under the wide pulse width.But when pulsewidth when 100 nanoseconds reduced, the changeable polarization of PZT when PLZT slightly reduces just too for having reduced.Therefore expect that the higher PLZT of lanthanum content can be operated under the utmost point short pulse duration better.
These results of PLZT show, are to have obtained splendid result 1.016 rather than 1.030 times at tetragonality factor c/a.I think that for the ferroelectric cell of working under the low pressure 1.01 the tetragonality factor will provide better result, even and 1.005 the tetragonality factor also be useful.
The ferroelectric material that another kind makes us having considerable interest is PNZT, i.e. Pb 1-xNb xZr yTi 1-yO 3We notice that this material and PLZT are similar, though polarity effect is much lower, tired and time is much the same.
Utilize existing common pulse fusion deposit (PLD) technology to make a series of test capacitor arrangement prototype.On the silicon substrate of (100) orientation, at first cover the TiN separator.Adopt PLD technology on the substrate that Ti-N covers, to cover the platinum contact layer subsequently.Under 600 ℃ oxygen atmosphere, utilize PLD technology growth ferroelectric layer subsequently.The ferroelectric rack lamination is by contact/template LSCO layer, PNZT ferroelectric layer contact the LSCO layer and form with the top down.
Table 2 has provided Pb 1-xNb xZr 0.2Ti 0.8O 3The crystal orientation parameter of film (i.e. the PNZT film of (x/80/20)).
x(%) c(nm) a(nm) c/a
0 0.4103 0.3968 1.034
6 0.4088 0.3975 1.0284
10 0.4083 0.3991 1.0233
Table 2
As shown in Figure 8, under polar voltages 4.5V, measured the B-H loop of the capacitor arrangement of three kinds of compositions.Loop 100 shows the B-H loop of x=0 (being PZT); Loop 102 corresponding x=6%; And loop 104 corresponding x=10%.For x=6%, polarization property descends to a certain degree, and for x=10%, the decline degree is bigger.Yet rich niobium sample has good hysteresis characteristic.
(the Ti that utilizes content of niobium to change 0.9Al 0.1) the N separator obtained hysteresis characteristic.Anatomizing of these curves demonstrated interested result, and maximum applies voltage and reduces to occur tired with device.In Fig. 9, show and switch polarization Δ P=P *-P applies voltage V as maximum MaxThe curve of function.Curve 110 has provided the switching polarization of Nb content x=0%; Curve 112 corresponding x=6%; Curve 114 corresponding x=10%.No Nb sample (being PZT) has maximum switching polarization under 5 volts of the highest switched voltages.The sample of x=6% reduces to a certain extent to some extent, and the highest niobium of content has minimum switching polarization.Under 4 volts, differ greatly.But along with maximum voltage is reduced to below 3 volts, situation changes.Under 2 volts, 6% and 10% result together.Figure 10 shows under same three kinds of Nb content and applies voltage V as maximum MaxThe coercive voltage V of function cWhat curve 120 provided is the value of x=0; Curve 122 is x=6%; And curve 124 is x=10%.Lower V cCorresponding lower V SatWith preferable low pressure character.
Fatigue results is more interesting.Memory cell occurs tired under the bipolar pulse of 1MHz.The bipolar switching polarization ± P of each measurement during fatigue and cyclic, and Figure 11 shows the result.Curve 130 has provided the switch polarity under the x=0; Curve 132 is x=6%; And curve 134 is x=10%.The unit that Nb content is low is compared with the unit of x=10% when fatigue not occurring, has preferable switching polarization.But after the fatigue that prolongs, the unit of x=0 begins serious decreased performance to occur, and Nb content be 6% or higher unit have better total result.
Therefore La or Nb content should be increased to more than the general numerical value of recommending of commercial ferroelectric storage unit.For PLZT, when the Zr ratio is 20% left and right sides, lanthanum ratio x should be at least 3% and reasonable be less than 12% greater than 6%.I think if reach rational polarizability, the 15%th, and best La ratio.The high-load of La depends on the PLZT that forms in the non-ferroelectric phase.The Zr ratio can increase to 50%, and this moment, the lanthanum ratio was much smaller, and reasonable is about 2%.
For PNZT, I think for Zr and the identical ratio of Nb employing.With the c/a factor is example, should be decreased to 1.029 and be more preferably less than 1.025 for PNZT.Be reduced to 1.020 PNZT for the tetragonality factor, estimate to produce useful result.
Memory cell shown in Figure 1 only is used for explaining used precision architecture in the example.Also can adopt the ferroelectric structure of other crystal orientation orientations.Particularly need not the structure of platinum, that for example discloses in the U.S. Patent application 08/582,545 submitted on January 3rd, 1996 of people such as Dhote and 1997 U.S. Patent applications of submitting to regard to June 19 08/871,059 comprises the structure that intermetallic metal is isolated.The open WO 97/25745 of the former corresponding PCT.
Though the specific composition by PLZT and PNZT is described the present invention, it is not limited thereto.Can make tetragonality be lower than the ratio that produces the high polarization effect by the ratio of regulating the rare earth element except that lanthanum and niobium.
Therefore the present invention provides a kind of ferroelectric cell, and it is compromise between polarization and stress, thereby reduces fatigue and improve switch speed.

Claims (16)

1. ferroelectric storage unit is characterized in that comprising:
Metal oxide first electrode;
Be formed at the ferroelectric layer on described first electrode, have perovskite crystal structure and comprise Pb, Zr, Ti, O and at least one other rare earth element;
Be formed at second electrode on the described ferroelectric layer; And
With described two circuit that electrode links to each other, be used for power supply, control and read and be stored in the electric charge on the described ferroelectric layer and have maximum direct current supply voltage less than 3 volts,
Wherein said ferroelectric layer comprise enough ratios described at least one rare earth element so that described circuit under described maximum direct current supply voltage, work.
2. memory cell as claimed in claim 1 is characterized in that described at least one rare earth element comprises La.
3. memory cell as claimed in claim 1 is characterized in that described at least one rare earth element comprises Nb.
4. memory cell as claimed in claim 1 is characterized in that the ratio x that compares rare earth element with Pb ratio 1-x is no more than 3%.
5. memory cell as claimed in claim 4 is characterized in that described ratio x is equal to or greater than 6%.
6. memory cell as claimed in claim 6 is characterized in that described ratio x is no more than 30%.
7. ferroelectric cell is characterized in that comprising:
First electrode that comprises metal oxide;
Be formed at the ferroelectric layer on described first electrode, have perovskite crystal structure and comprise Pb 1-xNb xZr yTi 1-yO 3, x is equal to or greater than 3%; And
Be formed at second electrode on the described ferroelectric layer.
8. memory cell as claimed in claim 5 is characterized in that y is between 15%~30%.
9. memory cell as claimed in claim 2 is characterized in that y is about 20%.
10. memory cell as claimed in claim 9 is characterized in that x is equal to or greater than 6%.
11. memory cell as claimed in claim 10 is characterized in that x is no more than 15%.
12. a ferroelectric cell is characterized in that comprising:
First electrode that comprises metal oxide;
Be formed on described first electrode and comprise the ferroelectric layer of second rare earth element, at least one cation element and oxygen of first rare earth element, second quantity of first quantity, constitute perovskite crystal structure with first tetragonality factor;
Be formed at second electrode on the described ferroelectric layer; And
If the numerical value of wherein said first and second quantity is chosen as second perovskite structure that described ferroelectric layer is formed at no described first rare earth element, the then described first tetragonality factor is less than the second tetragonality factor that produces, and first polarization characteristic of described first perovskite crystal structure is less than at least one corresponding second polarization characteristic in described second.
13. ferroelectric cell as claimed in claim 12, be chosen as the 3rd perovskite structure that described ferroelectric layer is formed at no any described second rare earth element if it is characterized in that the numerical value of described first and second quantity, the then described first tetragonality factor is less than the 3rd tetragonality factor that produces, and first polarization characteristic of described first perovskite crystal structure is less than corresponding the 3rd polarization characteristic of described the 3rd perovskite crystal structure.
14. ferroelectric cell as claimed in claim 12 is characterized in that further comprising and described two circuit that electrode links to each other, and is used for power supply, control and read to be stored in the electric charge on the described ferroelectric layer and to have maximum direct current supply voltage less than 3 volts,
15. ferroelectric cell as claimed in claim 12 is characterized in that described ferroelectric layer comprises Pb, La, Zr, Ti and O.
16. ferroelectric cell as claimed in claim 12 is characterized in that described ferroelectric layer comprises Pb, Nb, Zr, Ti and O.
CN99811267A 1998-09-24 1999-09-24 Ferroelectric thin film of reduced tetragonality Pending CN1319256A (en)

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US7718487B2 (en) 2005-06-02 2010-05-18 Seiko Epson Corporation Method of manufacturing ferroelectric layer and method of manufacturing electronic instrument
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US11217661B2 (en) 2020-02-03 2022-01-04 Industrial Technology Research Institute Ferroelectric memories

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JP3791614B2 (en) 2002-10-24 2006-06-28 セイコーエプソン株式会社 Ferroelectric film, ferroelectric memory device, piezoelectric element, semiconductor element, piezoelectric actuator, liquid ejecting head, and printer
JP2006024748A (en) * 2004-07-08 2006-01-26 Fujitsu Ltd Semiconductor device with ferroelectric capacitor and its manufacturing method
JP5103706B2 (en) * 2004-07-30 2012-12-19 富士通株式会社 Semiconductor device having ferroelectric capacitor and manufacturing method thereof
JP4303209B2 (en) 2005-02-04 2009-07-29 富士通株式会社 Ferroelectric element and method for manufacturing ferroelectric element
JP6036460B2 (en) * 2013-03-26 2016-11-30 三菱マテリアル株式会社 Method for forming PNbZT ferroelectric thin film
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US5248564A (en) * 1992-12-09 1993-09-28 Bell Communications Research, Inc. C-axis perovskite thin films grown on silicon dioxide
US5777356A (en) * 1996-01-03 1998-07-07 Bell Communications Research, Inc. Platinum-free ferroelectric memory cell with intermetallic barrier layer and method of making same

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US7718487B2 (en) 2005-06-02 2010-05-18 Seiko Epson Corporation Method of manufacturing ferroelectric layer and method of manufacturing electronic instrument
CN1873926B (en) * 2005-06-02 2010-12-22 精工爱普生株式会社 Method of manufacturing ferroelectric layer and method of manufacturing electronic device
US10833091B2 (en) 2018-12-13 2020-11-10 Industrial Technology Research Institute Ferroelectric memories
US11217661B2 (en) 2020-02-03 2022-01-04 Industrial Technology Research Institute Ferroelectric memories

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