JP4671600B2 - 半導体装置の作製方法 - Google Patents

半導体装置の作製方法 Download PDF

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Publication number
JP4671600B2
JP4671600B2 JP2003431911A JP2003431911A JP4671600B2 JP 4671600 B2 JP4671600 B2 JP 4671600B2 JP 2003431911 A JP2003431911 A JP 2003431911A JP 2003431911 A JP2003431911 A JP 2003431911A JP 4671600 B2 JP4671600 B2 JP 4671600B2
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JP
Japan
Prior art keywords
film
layer
substrate
oxide film
tungsten
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2003431911A
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English (en)
Japanese (ja)
Other versions
JP2004221570A (ja
JP2004221570A5 (enExample
Inventor
舜平 山崎
徹 高山
純矢 丸山
由美子 大野
裕吾 後藤
秀明 桑原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Energy Laboratory Co Ltd
Original Assignee
Semiconductor Energy Laboratory Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Energy Laboratory Co Ltd filed Critical Semiconductor Energy Laboratory Co Ltd
Priority to JP2003431911A priority Critical patent/JP4671600B2/ja
Publication of JP2004221570A publication Critical patent/JP2004221570A/ja
Publication of JP2004221570A5 publication Critical patent/JP2004221570A5/ja
Application granted granted Critical
Publication of JP4671600B2 publication Critical patent/JP4671600B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68359—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used as a support during manufacture of interconnect decals or build up layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68368—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01087—Francium [Fr]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor

Landscapes

  • Ceramic Capacitors (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)
JP2003431911A 2002-12-27 2003-12-26 半導体装置の作製方法 Expired - Fee Related JP4671600B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003431911A JP4671600B2 (ja) 2002-12-27 2003-12-26 半導体装置の作製方法

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2002380726 2002-12-27
JP2003431911A JP4671600B2 (ja) 2002-12-27 2003-12-26 半導体装置の作製方法

Publications (3)

Publication Number Publication Date
JP2004221570A JP2004221570A (ja) 2004-08-05
JP2004221570A5 JP2004221570A5 (enExample) 2007-02-15
JP4671600B2 true JP4671600B2 (ja) 2011-04-20

Family

ID=32911287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003431911A Expired - Fee Related JP4671600B2 (ja) 2002-12-27 2003-12-26 半導体装置の作製方法

Country Status (1)

Country Link
JP (1) JP4671600B2 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013179358A (ja) * 2007-03-13 2013-09-09 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101187403B1 (ko) 2004-06-02 2012-10-02 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치 제조방법
US7591863B2 (en) 2004-07-16 2009-09-22 Semiconductor Energy Laboratory Co., Ltd. Laminating system, IC sheet, roll of IC sheet, and method for manufacturing IC chip
WO2006022196A1 (en) 2004-08-23 2006-03-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and its manufacturing method
CN100474629C (zh) 2004-08-23 2009-04-01 株式会社半导体能源研究所 无线芯片及其制造方法
JP5352040B2 (ja) * 2004-08-23 2013-11-27 株式会社半導体エネルギー研究所 半導体装置の作製方法
EP1763860A4 (en) 2004-09-03 2012-11-07 Semiconductor Energy Lab SYSTEM FOR COLLECTING HEALTH DATA AND SEMICONDUCTOR ARRANGEMENT
JP4749102B2 (ja) * 2004-09-24 2011-08-17 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5008289B2 (ja) * 2004-09-24 2012-08-22 株式会社半導体エネルギー研究所 半導体装置の作製方法、剥離方法
KR101258672B1 (ko) * 2004-10-22 2013-04-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치
WO2006051996A1 (en) * 2004-11-11 2006-05-18 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
JP2006165535A (ja) * 2004-11-11 2006-06-22 Semiconductor Energy Lab Co Ltd 半導体装置
US8030643B2 (en) 2005-03-28 2011-10-04 Semiconductor Energy Laboratory Co., Ltd. Memory device and manufacturing method the same
US7687327B2 (en) * 2005-07-08 2010-03-30 Kovio, Inc, Methods for manufacturing RFID tags and structures formed therefrom
JP4619900B2 (ja) * 2005-08-22 2011-01-26 京セラ株式会社 有機ｅｌディスプレイ及び有機ｅｌディスプレイの製造方法
US7548407B2 (en) * 2005-09-12 2009-06-16 Qualcomm Incorporated Capacitor structure
US20090267182A1 (en) * 2006-05-18 2009-10-29 Nxp B.V. Method of increasing the quality factor of an inductor in a seimiconductor device
JP2008135639A (ja) * 2006-11-29 2008-06-12 Kyocera Corp 積層セラミック電子部品の製造方法及び製造装置
EP2202802B1 (en) 2008-12-24 2012-09-26 Semiconductor Energy Laboratory Co., Ltd. Driver circuit and semiconductor device
JP6087046B2 (ja) * 2011-03-01 2017-03-01 太陽誘電株式会社 薄膜素子の転写方法及び回路基板の製造方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745786A (ja) * 1993-08-02 1995-02-14 Tdk Corp 複合集積回路部品
JPH1126733A (ja) * 1997-07-03 1999-01-29 Seiko Epson Corp 薄膜デバイスの転写方法、薄膜デバイス、薄膜集積回路装置，アクティブマトリクス基板、液晶表示装置および電子機器

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013179358A (ja) * 2007-03-13 2013-09-09 Semiconductor Energy Lab Co Ltd 半導体装置の作製方法

Also Published As

Publication number Publication date
JP2004221570A (ja) 2004-08-05

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