JP4629943B2 - 多層緩衝層使用のレチクルにおける基板欠陥の軽減 - Google Patents

多層緩衝層使用のレチクルにおける基板欠陥の軽減 Download PDF

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Publication number
JP4629943B2
JP4629943B2 JP2001542276A JP2001542276A JP4629943B2 JP 4629943 B2 JP4629943 B2 JP 4629943B2 JP 2001542276 A JP2001542276 A JP 2001542276A JP 2001542276 A JP2001542276 A JP 2001542276A JP 4629943 B2 JP4629943 B2 JP 4629943B2
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Prior art keywords
buffer layer
depositing
multilayer
reflective coating
reticle
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Expired - Lifetime
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JP2001542276A
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Japanese (ja)
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JP2003515794A (ja
JP2003515794A5 (https=
Inventor
ポール ビー. マーカライミー,
バジット,ササ
ダニエル ジー. スティアーンズ,
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EUV LLC
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EUV LLC
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y40/00Manufacture or treatment of nanostructures
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B82NANOTECHNOLOGY
    • B82YSPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/22Masks or mask blanks for imaging by radiation of 100nm or shorter wavelength, e.g. X-ray masks, extreme ultraviolet [EUV] masks; Preparation thereof
    • G03F1/24Reflection masks; Preparation thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/38Masks having auxiliary features, e.g. special coatings or marks for alignment or testing; Preparation thereof
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F1/00Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
    • G03F1/68Preparation processes not covered by groups G03F1/20 - G03F1/50
    • G03F1/72Repair or correction of mask defects

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Nanotechnology (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Recrystallisation Techniques (AREA)
  • Electron Beam Exposure (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2001542276A 1999-12-06 2000-11-16 多層緩衝層使用のレチクルにおける基板欠陥の軽減 Expired - Lifetime JP4629943B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/454,715 1999-12-06
US09/454,715 US6319635B1 (en) 1999-12-06 1999-12-06 Mitigation of substrate defects in reticles using multilayer buffer layers
PCT/US2000/031584 WO2001040871A1 (en) 1999-12-06 2000-11-16 Mitigation of substrate defects in reticles using multilayer buffer layers

Publications (3)

Publication Number Publication Date
JP2003515794A JP2003515794A (ja) 2003-05-07
JP2003515794A5 JP2003515794A5 (https=) 2007-12-27
JP4629943B2 true JP4629943B2 (ja) 2011-02-09

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JP2001542276A Expired - Lifetime JP4629943B2 (ja) 1999-12-06 2000-11-16 多層緩衝層使用のレチクルにおける基板欠陥の軽減

Country Status (8)

Country Link
US (2) US6319635B1 (https=)
EP (1) EP1248963B1 (https=)
JP (1) JP4629943B2 (https=)
KR (1) KR100704429B1 (https=)
AT (1) ATE321294T1 (https=)
AU (1) AU1772001A (https=)
DE (1) DE60026876T2 (https=)
WO (1) WO2001040871A1 (https=)

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US7326502B2 (en) * 2003-09-18 2008-02-05 Intel Corporation Multilayer coatings for EUV mask substrates
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Publication number Publication date
KR20020061611A (ko) 2002-07-24
KR100704429B1 (ko) 2007-04-06
DE60026876T2 (de) 2006-10-26
WO2001040871A1 (en) 2001-06-07
US6319635B1 (en) 2001-11-20
EP1248963A1 (en) 2002-10-16
ATE321294T1 (de) 2006-04-15
JP2003515794A (ja) 2003-05-07
DE60026876D1 (de) 2006-05-11
US20010019803A1 (en) 2001-09-06
EP1248963B1 (en) 2006-03-22
US6489066B2 (en) 2002-12-03
AU1772001A (en) 2001-06-12

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