US20140272684A1 - Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor - Google Patents
Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor Download PDFInfo
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- US20140272684A1 US20140272684A1 US14/139,415 US201314139415A US2014272684A1 US 20140272684 A1 US20140272684 A1 US 20140272684A1 US 201314139415 A US201314139415 A US 201314139415A US 2014272684 A1 US2014272684 A1 US 2014272684A1
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- 238000000034 method Methods 0.000 title claims description 21
- 238000001900 extreme ultraviolet lithography Methods 0.000 title description 12
- 238000012545 processing Methods 0.000 claims abstract description 21
- 238000005240 physical vapour deposition Methods 0.000 claims abstract description 11
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims abstract description 8
- 229910052750 molybdenum Inorganic materials 0.000 claims abstract description 8
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Images
Classifications
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
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- G03F1/00—Originals for photomechanical production of textured or patterned surfaces, e.g., masks, photo-masks, reticles; Mask blanks or pellicles therefor; Containers specially adapted therefor; Preparation thereof
- G03F1/22—Masks or mask blanks for imaging by radiation of 100nm or shorter wavelength, e.g. X-ray masks, extreme ultraviolet [EUV] masks; Preparation thereof
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
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- C23C14/042—Coating on selected surface areas, e.g. using masks using masks
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- C—CHEMISTRY; METALLURGY
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- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/04—Coating on selected surface areas, e.g. using masks
- C23C16/042—Coating on selected surface areas, e.g. using masks using masks
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/458—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating characterised by the method used for supporting substrates in the reaction chamber
- C23C16/4582—Rigid and flat substrates, e.g. plates or discs
- C23C16/4583—Rigid and flat substrates, e.g. plates or discs the substrate being supported substantially horizontally
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/50—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating using electric discharges
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/16—Coating processes; Apparatus therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32715—Workpiece holder
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
- H01J37/32899—Multiple chambers, e.g. cluster tools
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
- H01J37/3402—Gas-filled discharge tubes operating with cathodic sputtering using supplementary magnetic fields
- H01J37/3405—Magnetron sputtering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
- H01J37/3411—Constructional aspects of the reactor
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- H01J37/3417—Arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
- H01J37/3411—Constructional aspects of the reactor
- H01J37/3447—Collimators, shutters, apertures
Abstract
A processing system includes: a vacuum chamber; a plurality of processing systems attached around the vacuum chamber; and a wafer handling system in the vacuum chamber for moving the wafer among the plurality of processing systems without exiting from a vacuum. A physical vapor deposition system for manufacturing an extreme ultraviolet blank comprising: a target comprising molybdenum, molybdenum alloy, or a combination thereof.
Description
- This application claims the benefit of U.S. Provisional Patent Application Ser. No. 61/778,402 filed Mar. 12, 2013, and the subject matter thereof is incorporated herein by reference thereto.
- The present application contains subject matter related to a concurrently filed U.S. patent application by Cara Beasley, Ralf Hofmann, Majeed Foad, and Timothy Michaelson entitled “PLANARIZED EXTREME ULTRAVIOLET LITHOGRAPHY BLANK, AND MANUFACTURING AND LITHOGRAPHY SYSTEMS THEREFOR”. The related application is assigned to Applied Materials, Inc. and is identified by docket number 017964USA/ATG/ATG/ESONG. The subject matter thereof is incorporated herein by reference thereto.
- The present application contains subject matter related to a concurrently filed U.S. patent application by Ralf Hofmann and Kevin Moraes entitled “AMORPHOUS LAYER EXTREME ULTRAVIOLET LITHOGRAPHY BLANK, AND MANUFACTURING AND LITHOGRAPHY SYSTEMS THEREFOR”. The related application is assigned to Applied Materials, Inc. and is identified by docket number 020388USA/ATG/ATG/ESONG. The subject matter thereof is incorporated herein by reference thereto.
- The present application contains subject matter related to a concurrently filed U.S. patent application by Timothy Michaelson, Timothy W. Weidman, Barry Lee Chin, Majeed Foad, and Paul Deaton entitled “VAPOR DEPOSITION DEPOSITED PHOTORESIST, AND MANUFACTURING AND LITHOGRAPHY SYSTEMS THEREFOR”. The related application is assigned to Applied Materials, Inc. and is identified by docket number 017922USA/ATG/ATG/ESONG. The subject matter thereof is incorporated herein by reference thereto.
- The present application contains subject matter related to a concurrently filed U.S. patent application by Soumendra N. Barman, Cara Beasley, Abhijit Basu Mallick, Ralf Hofmann, and Nitin K. Ingle entitled “ULTRA-SMOOTH LAYER ULTRAVIOLET LITHOGRAPHY MIRRORS AND BLANKS, AND MANUFACTURING AND LITHOGRAPHY SYSTEMS THEREFOR”. The related application is assigned to Applied Materials, Inc. and is identified by docket number 020600USA/ATG/ATG/ESONG. The subject matter thereof is incorporated herein by reference thereto.
- The present invention relates generally to extreme ultraviolet lithography blanks, and manufacturing and lithography systems for such extreme ultraviolet lithography blanks
- Extreme ultraviolet lithography (EUV, also known as soft x-ray projection lithography) is a contender to replace deep ultraviolet lithography for the manufacture of 0.13 micron, and smaller, minimum feature size semiconductor devices.
- However, extreme ultraviolet light, which is generally in the 5 to 40 nanometer wavelength range, is strongly absorbed in virtually all materials. For that reason, extreme ultraviolet systems work by reflection rather than by transmission of light. Through the use of a series of mirrors, or lens elements, and a reflective element, or mask blank, coated with a non-reflective absorber mask pattern, the patterned actinic light is reflected onto a resist-coated semiconductor wafer.
- The lens elements and mask blanks of extreme ultraviolet lithography systems are coated with reflective multilayer coatings of materials such as molybdenum and silicon. Reflection values of approximately 65% per lens element, or mask blank, have been obtained by using substrates that are coated with multilayer coatings that strongly reflect light essentially at a single wavelength within a extremely narrow ultraviolet bandpass; e.g., 12 to 14 nanometer bandpass for 13 nanometer ultraviolet light.
- There are various classes of defects in semiconductor processing technology which cause problems. Opaque defects are typically caused by particles on top of the multilayer coatings or mask pattern which absorb light when it should be reflected. Clear defects are typically caused by pinholes in the mask pattern on top of the multilayer coatings through which light is reflected when it should be absorbed. And phase defects are typically caused by scratches and surface variations beneath the multilayer coatings which cause transitions in the phase of the reflected light. These phase transitions result in light wave interference effects which distort or alter the pattern that is to be exposed in the resist on the surface of the semiconductor wafer. Because of the shorter wavelengths of radiation which must be used for sub-0.13 micron minimum feature size, scratches and surface variations which were insignificant before now become intolerable.
- While progress has been made in reducing or eliminating particle defects and work has been done on repair of opaque and clear defects in masks, to date nothing has been done to address the problem of phase defects. For deep ultraviolet lithography, surfaces are processed to maintain phase transitions below 60 degrees. Similar processing for extreme ultraviolet lithography is yet to be developed.
- For an actinic wavelength of 13 nanometers, a 180 degree phase transition in the light reflected from the multilayer coating may occur for a scratch of as little as 3 nanometers in depth in the underlying surface. This depth gets shallower with shorter wavelengths. Similarly, at the same wavelength, surface variations more abrupt than one (1) nanometer rise over one hundred (100) nanometers run may cause similar phase transitions. These phase transitions can cause a phase defect at the surface of the semiconductor wafer and irreparably damage the semiconductor devices.
- In the past, mask blanks for deep ultraviolet lithography have generally been of glass but silicon or ultra low thermal expansion materials have been proposed as alternatives for extreme ultraviolet lithography. Whether the blank is of glass, silicon, or ultra low thermal expansion material, the surface of the mask blank is made as smooth as possible by such processes a chemical mechanical polishing, magneto-rheological finishing, or ion beam polishing. The scratches that are left behind in such a process are sometimes referred to as “scratch-dig” marks, and their depth and width depend upon the size of the particles in the abrasive used to polish the mask blank. For visible and deep ultraviolet lithography, these scratches are too small to cause phase defects in the pattern on the semiconductor wafer. However, for extreme ultraviolet lithography, scratch-dig marks are a significant problem because they will appear as phase defects.
- Due to the short illumination wavelengths required for EUV lithography the pattern masks used must be reflective mask instead of the transmissive masks used in current lithography. The reflective mask is made up of a precise stack of alternating thin layers of molybdenum and silicon, which creates a Bragg refractor or mirror. Because of the nature of the multilayer stack and the small feature size, any imperfections in the surface of the substrate on which the multilayer stack is deposited will be magnified and impact the final product. Imperfections on the scale of a few nanometers can show up as printable defects on the finished mask and need to be eliminated from the surface of the mask blank before deposition of the multilayer stack.
- Typical masks used in optical lithography consist of a glass blank and a patterned chrome layer that blocks light transmission. In contrast in EUV lithography, the mask consists of a reflective layer and a patterned absorber layer. This architectural change is necessary due to the high absorbance of EUV light in most materials.
- The reflector layer is a stack of 80 or more alternating layers of molybdenum and silicon. The precision for the layer thickness and smoothness of this stack is critical to achieve high reflectivity of the mask as well as line edge roughness, respectively.
- Current technology employs glass polishing and cleaning processes to obtain a smooth substrate surface and ion beam deposition for the reflector layers.
- This process flow does not meet the stringent defect specifications. The main causes of defects are pits and bumps in the glass substrate left behind by the polishing process as well as the subsequent cleaning. The ion beam deposition process further leaves particles embedded in and on top of the multilayer stack.
- Thus, it is increasingly critical that answers be found to these problems and a system be developed that resolves these questions. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures adds an even greater urgency to the critical necessity for finding answers to these problems.
- Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.
- An embodiment of the present invention provides a processing system that includes: a vacuum chamber; a plurality of processing systems attached around the vacuum chamber; and a wafer handling system in the vacuum chamber for moving a wafer among the plurality of processing systems without exiting from a vacuum.
- An embodiment of the present invention provides a physical vapor deposition system for manufacturing an extreme ultraviolet blank comprising: a target comprising molybdenum, molybdenum alloy, or a combination thereof.
- Certain embodiments of the invention have other steps or elements in addition to or in place of those mentioned above. The steps or element will become apparent to those skilled in the art from a reading of the following detailed description when taken with reference to the accompanying drawings.
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FIG. 1 is a shown an integrated extreme ultraviolet (EUV) mask production system in accordance with an embodiment of the present invention. -
FIG. 2 is the first multi-cathode source in accordance with an embodiment of the present invention. -
FIG. 3 is a cross-section of the first multi-cathode source in accordance with an embodiment of the present invention. -
FIG. 4 is the cross-section of the first multi-cathode source in operation in accordance with an embodiment of the present invention. -
FIG. 5 is a mask blank which is square in shape and has a multi-layer stack in accordance with an embodiment of the present invention. -
FIG. 6 is the mask blank in a supported position on a carrier in accordance with an embodiment of the present invention. -
FIG. 7 is the mask blank in a supported position on a carrier in accordance with an embodiment of the present invention. -
FIG. 8 is the mask blank in a supported position on a carrier in accordance with an embodiment of the present invention. -
FIG. 9 is the mask blank in a supported position on a carrier in accordance with an embodiment of the present invention. -
FIG. 10 is the mask blank in a supported position on a carrier in accordance with an embodiment of the present invention. -
FIG. 11 is the mask blank in a supported position on a carrier in accordance with an embodiment of the present invention. -
FIG. 12 is a method for making the mask blank with ultra-low defects. - The following embodiments are described in sufficient detail to enable those skilled in the art to make and use the invention. It is to be understood that other embodiments would be evident based on the present disclosure, and that system, process, or mechanical changes may be made without departing from the scope of the present invention.
- In the following description, numerous specific details are given to provide a thorough understanding of the invention. However, it will be apparent that the invention may be practiced without these specific details. In order to avoid obscuring the present invention, some well-known circuits, system configurations, and process steps are not disclosed in detail.
- The drawings showing embodiments of the system are semi-diagrammatic and not to scale and, particularly, some of the dimensions are for the clarity of presentation and are shown exaggerated in the drawing FIGS. Similarly, although the views in the drawings for ease of description generally show similar orientations, this depiction in the FIGS. is arbitrary for the most part. Generally, the invention can be operated in any orientation.
- Where multiple embodiments are disclosed and described having some features in common, for clarity and ease of illustration, description, and comprehension thereof, similar and like features will be described with similar reference numerals.
- For expository purposes, the term “horizontal” as used herein is defined as a plane parallel to the plane or surface of a mask blank, regardless of its orientation. The term “vertical” refers to a direction perpendicular to the horizontal as just defined. Terms, such as “above”, “below”, “bottom”, “top”, “side” (as in “sidewall”), “higher”, “lower”, “upper”, “over”, and “under”, are defined with respect to the horizontal plane, as shown in the figures. The term “on” indicates that there is direct contact between elements.
- The term “processing” as used herein includes deposition of material or photoresist, patterning, exposure, development, etching, cleaning, and/or removal of the material or photoresist as required in forming a described structure.
- Embodiments of the present invention use various established techniques for depositing silicon, silicon oxide, and related films of compatible thermal expansion coefficient by CVD, PVD, ALD, and flowable CVD to fill the pits and bury the defects. Once deposited, the films surface maybe smooth and flat enough for further multilayer stack deposition, or may then be smoothed further using a variety of established smoothing or polishing techniques, including CMP, annealing, or ion beam polishing.
- Referring now to
FIG. 1 , therein is shown an integrated extreme ultraviolet (EUV)mask production system 100 in accordance with an embodiment of the present invention. The integrated EUVmask production system 100 is a processing system that processes wafers or blanks on a carrier and that includes a mask blank loading andcarrier handling system 102 into which maskblanks 104 are loaded. - An
airlock 106 provides access to a wafer handlingvacuum chamber 108. In the embodiment shown, the wafer handlingvacuum chamber 108 contains two vacuum chambers, afirst vacuum chamber 110 and asecond vacuum chamber 112. Within thefirst vacuum chamber 110 is a firstwafer handling system 114 and in thesecond vacuum chamber 112 is a secondwafer handling system 116. - The wafer handling
vacuum chamber 108 has a plurality of ports around its periphery for attachment of various other systems. Thefirst vacuum chamber 110 has adegas system 118, a first physicalvapor deposition system 120, a second physicalvapor deposition system 122, and apreclean system 124. - The
second vacuum chamber 112 has a firstmulti-cathode source 126, a flowable chemical vapor deposition (FCVD)system 128, acure chamber 130, and a secondmulti-cathode source 132 connected to it. TheFCVD system 128 can deposit a planarization layer on a substrate, a blank, or awafer 136 and the cure chamber can cure the planarization layer. The secondmulti-cathode source 132 can deposit a multi-layer stack of reflective material and other systems can deposit a capping layer. The planarization layer, the multi-layer stack, and the capping layer all become part of thewafer 136. - The first
wafer handling system 114 is capable of moving wafers, such as awafer 134, among theairlock 106 and to one or more of the various systems around the periphery of thefirst vacuum chamber 110 and through slit valves in a continuous vacuum. The secondwafer handling system 116 is capable of moving wafers, such as awafer 136, around thesecond vacuum chamber 112 while maintaining the wafers in a continuous vacuum. The firstwafer handling system 114 and the secondwafer handling system 116 are capable of moving thewafer 136 selectively through one or all of the systems around the periphery of thefirst vacuum chamber 110 and thesecond vacuum chamber 114 to allow the various processes to be performed without having thewafer 136 exit from the vacuum until it is removed through theairlock 106. - Referring now to
FIG. 2 , therein is shown the firstmulti-cathode source 126 in accordance with an embodiment of the present invention. The firstmulti-cathode source 126 includes abase structure 200 with acylindrical body portion 202 capped by atop adapter 204. - The
top adapter 204 has provisions for a number of cathode sources, such ascathode sources top adapter 204. - Referring now to
FIG. 3 , therein is shown a cross-section of the firstmulti-cathode source 126 in accordance with an embodiment of the present invention. The firstmulti-cathode source 126 has thebase structure 200, thecylindrical body portion 202, and thetop adapter 204. - Within the
base structure 200 is arotating pedestal 300 upon which a wafer, such as thewafer 136, can be secured. Above therotating pedestal 300 is acovering ring 302 with anintermediate ring 304 above thecovering ring 302. Aconical shield 306 is above theintermediate ring 304 and is surrounded by aconical adapter 308. - A
deposition area 310 for depositing material by physical vapor deposition (PVD) on thewafer 136 is surrounded by arotating shield 312 to which ashroud 314 is affixed. Above theshroud 314 is one of a number of targets, such as atarget 316, the source of the deposition material, and acathode 318. - In an alternate embodiment, a number of
individual shrouds 314 are each attached to an individual source and remain stationary as therotating shield 312 rotates. - Referring now to
FIG. 4 , therein is shown the cross-section of the firstmulti-cathode source 126 in operation in accordance with an embodiment of the present invention. The cross-section of the firstmulti-cathode source 126 shows an off-angledconical deposition pattern 400 with therotating pedestal 300 shown moved into position for a material deposition on awafer 402 from thetarget 316. - In operation, the
rotating pedestal 300 with thewafer 136 is moved up into position where it is in view of the opening in theshroud 314 ofFIG. 3 . Depending on the design of the firstmulti-cathode source 126, there can bemultiple shrouds 314 attached to thetop adapter 204 so each source has its own shroud, or with one should that rotates with therotating shield 312, or a single large rotating shield without the shroud. - The
rotating shield 312 is then rotated among the various cathodes until theappropriate cathode 318 andtarget 316 are positioned to deposit material at an angle on thewafer 136 on therotating pedestal 300. - By rotating the
pedestal 300, thewafer 136 will receive a uniform deposition of target material on its surface. - Referring now to
FIG. 5 , therein is shown a mask blank 500 which is square in shape and has amulti-layer stack 502 in accordance with an embodiment of the present invention. - Referring now to
FIG. 6 , therein is shown the mask blank 500 in a supported position on acarrier 600 in accordance with an embodiment of the present invention. Themask blank 500 has themulti-layer stack 502 facing up and is supported on thecarrier 600 on support pins 602 and is held in place laterally by retainingpins 604. A wedge-shapedsupport 606 can also be used at the bottom edge of themask blank 500. - Referring now to
FIG. 7 , therein is shown the mask blank 500 in a supported position on acarrier 700 in accordance with an embodiment of the present invention. Themask blank 500 has themulti-layer stack 502 facing up and is supported on thecarrier 700 on support pins 702 and is held in place laterally by retainingpins 704. A wedge-shapedsupport 706 can also be used at the bottom edge of themask blank 500. - Referring now to
FIG. 8 , therein is shown the mask blank 500 in a supported position on acarrier 800 in accordance with an embodiment of the present invention. Themask blank 500 has themulti-layer stack 502 facing up and is supported on thecarrier 800 on support pins 802 and is held in place laterally by retainingpins 804. Thecarrier 800 is slightly thicker than the thickness of the support pins 802 and the thickness of themask blank 500. An edgeexclusion cover mask 806 covers the edges of the mask blank 500 to prevent deposition of material in the edge areas of themulti-layer stack 502. A wedge-shapedsupport 808 can also be used at the bottom edge of themask blank 500. - Referring now to
FIG. 9 , therein is shown the mask blank 500 in a supported position on acarrier 900 in accordance with an embodiment of the present invention. Themask blank 500 has themulti-layer stack 502 facing down and is supported on thecarrier 900 on support pins 902 and is held in place laterally by retainingpins 904. The bottom side of thecarrier 900 has anopening 906 to allow for deposition from below. - Referring now to
FIG. 10 , therein is shown the mask blank 500 in a supported position on acarrier 1000 in accordance with an embodiment of the present invention. Themask blank 500 has themulti-layer stack 502 facing down and is supported on thecarrier 1000 onsupport pins 1002 and is held in place laterally by retainingpins 1004. The bottom side of thecarrier 1000 has anopening 1006 to allow for deposition from below. - Referring now to
FIG. 11 , therein is shown the mask blank 500 in a supported position on acarrier 1100 in accordance with an embodiment of the present invention. Themask blank 500 has themulti-layer stack 502 facing down and is supported on thecarrier 1100 onsupport pins 1102 and is held in place laterally by retainingpins 1104. The bottom side of the carrier has anopening 1106 to allow for deposition from below. - Referring now to
FIG. 12 , therein is shown amethod 1200 for making theEUV mask blank 500 ofFIG. 5 with ultra-low defects. Themethod 1200 begins with a mask blank being supplied to a vacuum in the EUVmask production system 100 ofFIG. 1 . - The mask blank is degassed and precleaned in a
step 1202. The planarization occurs in astep 1204. The planarization layer is deposited by CVD and is cured in astep 1206. The multi-layer deposition is performed by PVD in astep 1208 and the capping layer is applied in astep 1210. The degassing, precleaning, planarization, multi-layer deposition, and capping layer application is all performed in the EUVmask production system 100 without removing the mask blank from the vacuum. - The integrated EUV
mask production system 100 ofFIG. 1 can be used to make any type of lithographic blank, such as mask blanks and mirror blanks, as well as masks for a lithographic semiconductor manufacturing process. - Embodiments of the present invention provide an integrated tool concept for depositing the layer structure required on a EUV mask blank. These include smoothing layers to planarize defects on the glass blank (pits, scratches and particles in the few to tens of nm size range), the molybdenum and silicon multilayer stack deposition for the Bragg reflector, as well as the ruthenium capping layer (used to protect the molybdenum/silicon stack from oxidation).
- By integrating these steps into one process tool, it has been found that it is possible to achieve better interface control as well as better defect performance by limiting the number of handling steps.
- The substrate is placed on a carrier so that handling of the mask blank is minimized through multiple process steps. This will reduce the chance of handling-related particles on the substrate.
- The use of a cluster tool also allows the integration of dry cleaning processes to improve substrate cleanliness and thus adhesion of the layer stack without breaking vacuum.
- After loading the substrate into the integrated extreme ultraviolet (EUV) mask production system, the mask blank is first coated with a planarizing layer in a flowable CVD process, such as in the AMAT Eterna films, to fill pits and scratches on the substrate surface, as well as planarize any remaining small particles.
- Next, the substrate is moved to the deposition chamber for the multi-layer deposition. The chamber integrates multiple targets so that the entire stack can be deposited in one chamber without the need to transfer the substrate.
- The resulting system is straightforward, cost-effective, uncomplicated, highly versatile, and can be surprisingly and unobviously implemented by adapting known technologies, and are thus readily suited for efficiently and economically manufacturing EUV mask blanks.
- Embodiments of the invention provide an atomically flat, low defect, smooth surface for an EUV mask blank. However, embodiments of the invention could also be used to manufacture other types of blanks, such as for mirrors. Over a glass substrate, embodiments of the invention can be used to form an EUV mirror. Further, embodiments of the invention can be applied to other atomically flat, low defect, smooth surface structures used in UV, DUV, e-beam, visible, infrared, ion-beam, x-ray, and other types of semiconductor lithography. Embodiments of the invention can also be to form various size structures that can range from wafer-scale to device level and even to larger area displays and solar applications.
- Another important aspect of the present invention is that it valuably supports and services the historical trend of reducing costs, simplifying systems, and increasing performance.
- These and other valuable aspects of the present invention consequently further the state of the technology to at least the next level.
- While the invention has been described in conjunction with a specific best mode, it is to be understood that many alternatives, modifications, and variations will be apparent to those skilled in the art in light of the aforegoing description. Accordingly, it is intended to embrace all such alternatives, modifications, and variations that fall within the scope of the included claims. All matters hithertofore set forth herein or shown in the accompanying drawings are to be interpreted in an illustrative and non-limiting sense.
Claims (22)
1. A processing system comprising:
a vacuum chamber;
a plurality of processing systems attached around the vacuum chamber; and
a wafer handling system in the vacuum chamber for moving the wafer among the plurality of processing systems without exiting from a vacuum.
2. The system as claimed in claim 1 wherein the plurality of processing systems includes a degas system.
3. The system as claimed in claim 1 wherein the plurality of processing systems includes a physical vapor deposition system.
4. The system as claimed in claim 1 wherein the plurality of processing systems includes a preclean system.
5. The system as claimed in claim 1 further comprising an output for outputting an extreme ultraviolet mask blank.
6. The system as claimed in claim 1 further comprising an output for outputting an extreme ultraviolet mirror.
7. The system as claimed in claim 1 further comprising:
an additional vacuum chamber connected to the vacuum chamber;
an additional plurality of processing systems attached around the additional vacuum chamber; and
an additional wafer handling system in the additional vacuum chamber for moving the wafer among the additional plurality of processing systems without exiting from a vacuum.
8. The system as claimed in claim 5 wherein the additional plurality of processing systems includes a flowable chemical vapor deposition system.
9. The system as claimed in claim 5 wherein the additional plurality of processing systems includes a cure chamber.
10. The system as claimed in claim 5 wherein the additional plurality of processing systems includes a multi-cathode source.
11. The system as claimed in claim 10 further comprising a top adapter having provisions for a number of cathode sources around the top adapter.
12. The system as claimed in claim 10 further comprising a rotating pedestal for securing a wafer.
13. The system as claimed in claim 10 wherein the multi-cathode source comprises a plurality of cathodes and further comprising a rotating pedestal for placing a wafer at an angle to each of the plurality of cathodes.
14. The system as claimed in claim 10 wherein the multi-cathode source comprises a plurality of cathodes and further comprising a shroud attached to each of the plurality of cathodes.
15. The system as claimed in claim 10 wherein the multi-cathode source comprises a plurality of cathodes and further comprising a rotating shield for rotation among the one or more of the plurality of cathodes.
16. The system as claimed in claim 10 further comprising an edge exclusion cover mask for covering the edges of a wafer to prevent deposition of material in the edge areas of the wafer.
17. The system as claimed in claim 10 further comprising a carrier having support pins for supporting a wafer and retaining pins for laterally retaining the wafer.
18. The system as claimed in claim 10 further comprising a carrier having support pins for supporting a wafer and retaining pins for laterally retaining the wafer, the carrier having an opening to allow for deposition from below.
19. A physical vapor deposition system for manufacturing an extreme ultraviolet blank comprising:
a target comprising molybdenum, molybdenum alloy, or a combination thereof.
20. The system of claim 19 further comprising:
a second target comprising silicon.
21. A method of forming a EUV mask blank, comprising:
forming a planarization layer by chemical vapor deposition over a substrate; and
forming a multi-layer stack over the planarization layer by physical vapor deposition wherein forming the planarization layer and forming the multi-layer stack are performed in a production system without removing the substrate from vacuum.
22. The method as claimed in claim 21 further applying a capping layer to the multi-layer stack without removing the substrate from the vacuum.
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US14/139,415 US20140272684A1 (en) | 2013-03-12 | 2013-12-23 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
US14/139,371 US9612521B2 (en) | 2013-03-12 | 2013-12-23 | Amorphous layer extreme ultraviolet lithography blank, and manufacturing and lithography systems therefor |
TW103106805A TWI623054B (en) | 2013-03-12 | 2014-02-27 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
SG11201506470UA SG11201506470UA (en) | 2013-03-12 | 2014-03-12 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
KR1020157027663A KR102246809B1 (en) | 2013-03-12 | 2014-03-12 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
PCT/US2014/025124 WO2014165300A1 (en) | 2013-03-12 | 2014-03-12 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
CN201480013365.6A CN105144343B (en) | 2013-03-12 | 2014-03-12 | Extreme ultraviolet mask blank manufacture system and the operating method for the manufacture system |
KR1020217012331A KR102401043B1 (en) | 2013-03-12 | 2014-03-12 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
SG10201707081YA SG10201707081YA (en) | 2013-03-12 | 2014-03-12 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
JP2016501751A JP6625520B2 (en) | 2013-03-12 | 2014-03-12 | Extreme ultraviolet lithography mask blank manufacturing system and operating method therefor |
US15/400,482 US10788744B2 (en) | 2013-03-12 | 2017-01-06 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
US15/444,864 US20170168383A1 (en) | 2013-03-12 | 2017-02-28 | Amorphous Layer Extreme Ultraviolet Lithography Blank, And Manufacturing And Lithography Systems Therefor |
JP2019141985A JP2019219671A (en) | 2013-03-12 | 2019-08-01 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
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US201361778402P | 2013-03-12 | 2013-03-12 | |
US14/139,415 US20140272684A1 (en) | 2013-03-12 | 2013-12-23 | Extreme ultraviolet lithography mask blank manufacturing system and method of operation therefor |
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Also Published As
Publication number | Publication date |
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KR20150127165A (en) | 2015-11-16 |
TW201442136A (en) | 2014-11-01 |
JP2019219671A (en) | 2019-12-26 |
KR102401043B1 (en) | 2022-05-20 |
TWI623054B (en) | 2018-05-01 |
SG11201506470UA (en) | 2015-09-29 |
KR20210048604A (en) | 2021-05-03 |
US10788744B2 (en) | 2020-09-29 |
KR102246809B1 (en) | 2021-04-29 |
SG10201707081YA (en) | 2017-10-30 |
CN105144343A (en) | 2015-12-09 |
JP2016519778A (en) | 2016-07-07 |
US20170115555A1 (en) | 2017-04-27 |
CN105144343B (en) | 2018-08-24 |
JP6625520B2 (en) | 2019-12-25 |
WO2014165300A1 (en) | 2014-10-09 |
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