JP4461215B2 - 低誘電率絶縁材料とそれを用いた半導体装置 - Google Patents
低誘電率絶縁材料とそれを用いた半導体装置 Download PDFInfo
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- JP4461215B2 JP4461215B2 JP2003315923A JP2003315923A JP4461215B2 JP 4461215 B2 JP4461215 B2 JP 4461215B2 JP 2003315923 A JP2003315923 A JP 2003315923A JP 2003315923 A JP2003315923 A JP 2003315923A JP 4461215 B2 JP4461215 B2 JP 4461215B2
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- borazine
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- film
- wiring
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Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
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- Y10T428/31663—As siloxane, silicone or silane
Description
(1)ボラジン環の窒素原子にアルキル基を有し、ホウ素原子にアルキル基で置換された三重結合を含む有機基を有し、化8で示すボラジン化合物であって、ホウ素原子には、直接アセチレン基が結合しているか、あるいは、アセチレン基と結合したR2がホウ素原子に結合した化合物と、(2)少なくとも2個以上のヒドロシリル基を有し、化9で示すケイ素化合物、あるいは、少なくとも2個以上のヒドロシリル基を有し、化10で示す環状ケイ素化合物と、の、ハイドロシリレーション重合によって得られたボラジン・シリコンポリマーからなることである。
(1)ボラジン環の窒素原子にアルキル基を有し、ホウ素原子にアルキル基で置換された三重結合を含む有機基を有し、化11に示すボラジン化合物であり、ホウ素原子には、直接アセチレン基が結合しているか、あるいは、アセチレン基と結合したR2がホウ素原子に結合した化合物と化12に示すボラジン化合物であり、ボラジン環の窒素原子にアルキル基を有し、ホウ素原子にアルキル基で置換されていない三重結合を含む有機基を有し、ホウ素原子には、直接アセチレン基が結合しているか、あるいは、R2とR2が連なったものとが結合した化合物とを前記化5に示すボラジン化合物と、前記化4に示すボラジン化合物の割合がモル比で90:10から0:100までのいずれかの比になるように混合したものと、(2)少なくとも2個以上のヒドロシリル基を有し、化13で示すケイ素化合物、あるいは、少なくとも2個以上のヒドロシリル基を有し、化14で示す環状ケイ素化合物と、の、ハイドロシリレーション重合によって得られたボラジン・シリコンポリマーからなることである。
ε=(Cmax×d)/(ε0×S)
S:電極面積(m2)、d:膜厚(m)、Cmax:容量(F)、ε0:真空の誘電率(F・m-1)
B,B',B'',−トリプロピニル−N,N,N,−トリメチルボラジンと環状シロキサンの1,3,5,7−テトラメチルシクロテトラシロキサンのヒドロシリル化重合によって得られたボラジン・シロキサンポリマー溶液を、スピンコータによりSiO2を堆積した前記シリコン基板に塗布した。これをアルゴン(Ar)または窒素(N2)ガス雰囲気で、200〜300℃で10〜60分、さらに350〜450℃で10〜60分熱処理することにより厚さ80〜150nmのネットワーク構造のポリマー薄膜を形成した。例えば、アルゴン(Ar)または窒素(N2)ガス雰囲気で、250℃で30分、さらに400℃で30分熱処理することにより厚さ80〜150nmのネットワーク構造のポリマー薄膜を形成でき、CV法で測定したポリマー薄膜の比誘電率は、2.5であった。
B,B,B,−トリエチニル−N,N,N,−トリプロピニルボラジンと環状シロキサンの1,3,5,7−テトラメチルシクロテトラシロキサンのヒドロシリル化重合によって得られたボラジン−シロキサンポリマー溶液をスピンコータにより、SiO2を堆積した前記シリコン基板に塗布し、200〜300℃で10〜60分、さらに300〜450℃で10〜60分の熱処理をすることにより、厚さ100nmのネットワーク構造のポリマー薄膜を形成した。例えば、250℃で30分、さらに400℃で30分の熱処理をすることにより、厚さ100nmのネットワーク構造のポリマー薄膜を形成した。CV法で測定したこのポリマーの比誘電率は2.8であった。
まず、ボラジン・シロキサンポリマー222を100〜200nm堆積した。ボラジン・シロキサンポリマー222は、前記[条件1]または[条件2]で堆積した。
102 BPSG/CVD−SiO2
103 Wで埋め込んだ接続孔
104 プラズマCVD−SiO2
105 ボラジン・シロキサンポリマー
106 有機層間膜(SiLK膜)
107 ハードマスクとしてのボラジン・シロキサンポリマー膜
108 フォト・レジスト
109 接続孔103のパターンを形成したレジスト
110 電気的接続をとるための接続孔パターン
111 フォト・レジスト
112 第1層目配線のためのパターン形状
113 TaN/Ta膜
114 シード層Cu
115 Cu膜
116 キャップ材
117 ボラジン・シロキサンポリマー
118 SiLK膜
119 ボラジン・シロキサンポリマー膜
120 層間膜
121 ボラジン・シロキサンポリマー膜
122 レジスト
123 層間接続孔(VIA)形状を形成したレジスト
124 レジスト
125 配線パターンを転写したレジスト
126 TaN/Ta膜、127 シードCu層
128 Cu膜、129 キャップ材SiO2膜
201 シリコン(Si)基板
202 BPSG/CVD−SiO2
203 接続孔
204 プラズマCVD−SiO2
205 ボラジン・シロキサンポリマー
206 SiLK膜
207 ハードマスクとしてのボラジン・シロキサンポリマー膜
208 フォト・レジスト
209 接続孔のパターン形状転写したフォト・レジスト
210 電気的接続をとるための接続孔パターン
211 フォト・レジスト
212 ボラジン・シロキサンポリマー
213 SiLK膜
214 ハードマスクとしてのボラジン・シロキサンポリマー膜
215 フォト・レジスト
216 接続孔パターン216を転写したレジスト
217 接続孔
218 TaN/Ta層
219 Cuシード層
220 Cu薄膜
221 キャップ材SiO2
222 ボラジン・シロキサンポリマー
223 SiLK膜
224 ハードマスクとしてボラジン・シロキサンポリマー膜
225 レジスト
226 接続孔パターン形状を転写したフォト・レジスト
227 フォト・レジスト
228 第2層目配線のためのパターン形状を転写したレジスト
229 TaN/Ta膜、230 シード層Cu
231 Cu膜
232 キャップ材SiO2膜232
301 シリコン(Si)基板
302 BPSG/CVD−SiO2
303 Wで埋め込んだ接続孔
304 プラズマCVD−SiO2
305 ボラジン・シロキサンポリマー
306 MSQ膜
307 ボラジン・シロキサンポリマー膜
308 フォト・レジスト
309 接続孔のパターン形状を転写したレジスト
310 接続孔パターン、311 フォト・レジスト
312 配線パターン形状を転写したレジスト
313 TaN/Ta膜
314 シード層Cu
315 Cu膜
316 キャップ材SiO2膜
317 ボラジン・シロキサンポリマー
318 MSQ膜
319 ボラジン・シロキサンポリマー膜
320 MSQ膜
321 ボラジン・シロキサンポリマー膜
322 フォト・レジスト
323 層間接続孔(VIA)パターン
324 フォト・レジスト
325 第2の配線パターン
326 TaN/Ta膜
327 シードCu層
328 Cu膜
329 キャップ材SiO2膜
401 シリコン(Si)基板
402 BPSG/CVD−SiO2
403 Wで埋め込んだ接続孔
404 プラズマCVD−SiC
405 ボラジン・シロキサンポリマー
406 SiC膜
407 レジスト
408 接続孔パターン形状を形成したレジスト
409 電気的接続をとるための接続孔パターン
410 レジスト
411 配線パターン形状
412 TaN/Ta膜
413 シードCu膜
414 Cu膜
415 キャップ材SiC膜
416 ボラジン・シロキサンポリマー
417 エッチングストッパーとしてのSiC膜
418 ボラジンポリマー膜
419 ハードマスクとしてSiC膜
501 第1層銅(Cu)配線層
502 銅(Cu)の拡散バリア膜(DB)
503 第1層有機絶縁膜
504 エッチングストッパー膜
505 第弐層銅(Cu)配線層
506 配線間有機絶縁膜
507 ハードマスク(HM)
508 銅(Cu)の拡散バリア膜(DB)
509 第2層有機絶縁膜
510 エッチングストッパー膜
511 第3層銅(Cu)配線層、
620 レジスト
621 層間接続孔(VIA)形状
622 レジスト
623 第2の配線パターン
624 TaN/Ta膜
625 シードCu層
626 Cu膜
627 キャップ材SiC膜
Claims (4)
- 電気配線間の絶縁層に用いるものであって、
R1はアルキル基を示し、
R2はメチレン基を示し、
R3はアセチレン基に結合したアルキル基を示し、
R4およびR5はアルキル基、アリール基、アラルキル基または水素原子の中から選ばれる同一あるいは相異なる1価の基を示し、
R6は置換基を有していても良い芳香族の2価の基、酸素原子、または、オキシポリ(ジメチルシロキシ)基等のシロキサンで表されるものを示し、
R7はアルキル基、アリール基、またはアラルキル基を示すものとするとき、
ボラジン環の窒素原子にアルキル基を有し、ホウ素原子にアルキル基で置換された三重結合を含む有機基を有し、化1で示すボラジン化合物であって、ホウ素原子には、直接アセチレン基が結合しているか、あるいは、アセチレン基と結合したR2がホウ素原子に結合した化合物と、
少なくとも2個以上のヒドロシリル基を有し、化2で示すケイ素化合物、あるいは、少なくとも2個以上のヒドロシリル基を有し、化3で示す環状ケイ素化合物と、
の、ハイドロシリレーション重合によって得られたボラジン・シリコンポリマーからなる層間絶縁材料。
- 電気配線間の絶縁層に用いるものであって、
R1はアルキル基を示し、
R2はメチレン基を示し、
R3はアセチレン基に結合したアルキル基を示し、
R4およびR5はアルキル基、アリール基、アラルキル基または水素原子の中から選ばれる同一あるいは相異なる1価の基を示し、
R6は置換基を有していても良い芳香族の2価の基、酸素原子、または、オキシポリ(ジメチルシロキシ)基等のシロキサンで表されるものを示し、
R7はアルキル基、アリール基、またはアラルキル基を示し、
R8はアルキル基を示し、
R9はメチレン基を示し、
nは3以上の整数を示すものとするとき、
ボラジン環の窒素原子にアルキル基を有し、
ホウ素原子にアルキル基で置換された三重結合を含む有機基を有し、化4に示すボラジン化合物であり、ホウ素原子には、直接アセチレン基が結合しているか、あるいは、アセチレン基と結合したR2がホウ素原子に結合した化合物と
ボラジン環の窒素原子にアルキル基を有し、
ホウ素原子にアルキル基で置換されていない三重結合を含む有機基を有し、化5に示すボラジン化合物であり、ホウ素原子には、直接アセチレン基が結合しているか、あるいは、R2とR2が連なったものとが結合した化合物と
を前記化5に示すボラジン化合物と、前記化4に示すボラジン化合物の割合がモル比で90:10から0:100までのいずれかの比になるように混合したものと、
少なくとも2個以上のヒドロシリル基を有し、化6で示すケイ素化合物、あるいは、少なくとも2個以上のヒドロシリル基を有し、化7で示す環状ケイ素化合物と、
の、ハイドロシリレーション重合によって得られたボラジン・シリコンポリマーからなる層間絶縁材料。
- 所望の能動素子あるいは受動素子を形成した半導体領域表面上に形成された第1の配線層と、第1の配線層の上層に形成される第2の配線層とを備え、
前記の半導体領域と第1の配線層とを絶縁する第1の絶縁構造と、
第1の配線層で形成された配線間を絶縁する第2の絶縁構造と、
第1の配線層と、第2の配線層とを電気的に絶縁する構造に含まれ、かつ、第1の配線層と、第2の配線層とを電気的に接続するための接続孔が形成された第3の絶縁構造と、第2の配線層で形成された配線間を絶縁する第4の絶縁構造と、を、備える配線構造において、
(1)膜厚方向に関しては、第1の絶縁構造と第4の絶縁構造とに挟まれた領域で、平面的には、第1と第2の配線層を電気的に接続するための接続孔を除く領域、(2)膜厚方向に関しては、第1の絶縁構造と第4の絶縁構造とに挟まれた領域で、平面的には、第1の配線層による配線を除く領域、(3)第1及び第2配線層より上層に絶縁膜を挟んで第3の配線層がある場合で、膜厚方向に関しては、第1の絶縁構造より上の領域に設けられ、平面的には、第2と第3の配線層を電気的に接続するための接続孔を除く領域、あるいは、(4)第1及び第2配線層より上層に絶縁膜を挟んで第3の配線層がある場合で、膜厚方向に関しては、第1の絶縁構造より上の領域に設けられ、平面的には、第3の配線層による配線を除く領域、に設けられ、請求項1または2に記載の層間絶縁材料で形成される、第5の絶縁層を備えることを特徴とする半導体装置。 - 所望の能動素子、受動素子を形成した半導体領域表面上に形成された第1の配線層と、第1の配線層の上層に形成される第2の配線層とを備え、
前記の半導体領域と第1の配線層とを絶縁する第1の絶縁構造と、
第1の配線層で形成された配線間を絶縁する第2の絶縁構造と、
第1の配線層と、第2の配線層とを電気的に絶縁する構造に含まれ、かつ、第1の配線層と、第2の配線層とを電気的に接続するための接続孔が形成された第3の絶縁構造と、第2の配線層で形成された配線間を絶縁する第4の絶縁構造と、を、備える配線構造において、
上記の第2、3あるいは第4の絶縁構造のいずれかには、請求項1または2に記載の層間絶縁材料が含まれることを特徴とする半導体装置。
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