JP4443465B2 - 半導体素子の金属配線形成方法 - Google Patents
半導体素子の金属配線形成方法 Download PDFInfo
- Publication number
- JP4443465B2 JP4443465B2 JP2005150606A JP2005150606A JP4443465B2 JP 4443465 B2 JP4443465 B2 JP 4443465B2 JP 2005150606 A JP2005150606 A JP 2005150606A JP 2005150606 A JP2005150606 A JP 2005150606A JP 4443465 B2 JP4443465 B2 JP 4443465B2
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- Prior art keywords
- metal wiring
- insulating film
- etching
- interlayer insulating
- gas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- 239000002184 metal Substances 0.000 title claims description 55
- 229910052751 metal Inorganic materials 0.000 title claims description 55
- 239000004065 semiconductor Substances 0.000 title claims description 30
- 238000000034 method Methods 0.000 title description 45
- 238000005530 etching Methods 0.000 claims description 43
- 239000000758 substrate Substances 0.000 claims description 6
- 238000000059 patterning Methods 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 3
- 239000011229 interlayer Substances 0.000 description 34
- 239000010410 layer Substances 0.000 description 28
- 239000007789 gas Substances 0.000 description 15
- 230000015572 biosynthetic process Effects 0.000 description 10
- 229920000642 polymer Polymers 0.000 description 10
- 229920002120 photoresistant polymer Polymers 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 239000005368 silicate glass Substances 0.000 description 4
- 229910004298 SiO 2 Inorganic materials 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 3
- 229910052799 carbon Inorganic materials 0.000 description 3
- 238000009413 insulation Methods 0.000 description 3
- 230000007257 malfunction Effects 0.000 description 3
- 238000005406 washing Methods 0.000 description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 2
- 229910052731 fluorine Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 description 1
- 229910004491 TaAlN Inorganic materials 0.000 description 1
- 229910004166 TaN Inorganic materials 0.000 description 1
- 229910004200 TaSiN Inorganic materials 0.000 description 1
- 229910008482 TiSiN Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000009977 dual effect Effects 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- QRXWMOHMRWLFEY-UHFFFAOYSA-N isoniazide Chemical compound NNC(=O)C1=CC=NC=C1 QRXWMOHMRWLFEY-UHFFFAOYSA-N 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 150000004760 silicates Chemical class 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052718 tin Inorganic materials 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76804—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics by forming tapered via holes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
- H01L21/31138—Etching organic layers by chemical means by dry-etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- General Chemical & Material Sciences (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Drying Of Semiconductors (AREA)
Description
11 第1層間絶縁膜
12 第2層間絶縁膜
13 エッチング停止層
14 第3層間絶縁膜
15 フォトレジストパターン
17 溝
18 金属層
Claims (1)
- (a)絶縁膜が形成された半導体基板が提供される段階と、
(b)金属配線パターンマスクを利用して、40゜ないし70゜のエッチング角度で、CxFyガスとCH2F2ガスが混合した混合ガスを利用し、前記絶縁膜の上部角部位にラウンディングが形成されるように一部をパターニングする段階と、
(c)前記金属配線パターンマスクを利用して、60゜ないし80゜のエッチング角度で、CxFyガスとCH2F2ガス及びO2ガスを利用し、前記金属配線パターンマスクより幅の小さい溝を形成するように前記絶縁膜を完全にパターニングする段階と、
(d)前記溝が埋め込められるように金属層を蒸着する段階と、
(e)前記ラウンディング部位が除去されるように前記金属層を含む全体構造上部を平坦化して金属配線を形成する段階と、を含む半導体素子の金属配線形成方法。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020040054062A KR100607323B1 (ko) | 2004-07-12 | 2004-07-12 | 반도체 소자의 금속배선 형성방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006032912A JP2006032912A (ja) | 2006-02-02 |
JP4443465B2 true JP4443465B2 (ja) | 2010-03-31 |
Family
ID=35541923
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005150606A Expired - Fee Related JP4443465B2 (ja) | 2004-07-12 | 2005-05-24 | 半導体素子の金属配線形成方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7101786B2 (ja) |
JP (1) | JP4443465B2 (ja) |
KR (1) | KR100607323B1 (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100632658B1 (ko) * | 2004-12-29 | 2006-10-12 | 주식회사 하이닉스반도체 | 반도체 소자의 금속배선 형성방법 |
DE102010002454A1 (de) * | 2010-02-26 | 2011-09-01 | Globalfoundries Dresden Module One Limited Liability Company & Co. Kg | Metallisierungssystem eines Halbleiterbauelements mit verrundeten Verbindungen, die durch Hartmaskenverrundung hergestellt sind |
US10090167B2 (en) * | 2014-10-15 | 2018-10-02 | Taiwan Semiconductor Manufacturing Company | Semiconductor device and method of forming same |
TWI680496B (zh) * | 2016-09-13 | 2019-12-21 | 美商應用材料股份有限公司 | 高壓縮/拉伸的翹曲晶圓上的厚鎢硬遮罩膜沉積 |
TWI713961B (zh) | 2018-01-15 | 2020-12-21 | 美商應用材料股份有限公司 | 針對碳化鎢膜改善附著及缺陷之技術 |
CN110649134B (zh) * | 2018-06-26 | 2021-04-09 | 北京北方华创微电子装备有限公司 | 图形化衬底的制作方法、图形化衬底和发光二极管 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3024317B2 (ja) * | 1991-10-25 | 2000-03-21 | 日本電気株式会社 | 半導体装置の製造方法 |
US6143648A (en) * | 1997-02-18 | 2000-11-07 | Motorola, Inc. | Method for forming an integrated circuit |
JP3400770B2 (ja) * | 1999-11-16 | 2003-04-28 | 松下電器産業株式会社 | エッチング方法、半導体装置及びその製造方法 |
KR100611390B1 (ko) | 2000-06-30 | 2006-08-11 | 주식회사 하이닉스반도체 | 반도체소자의 전하저장전극 형성방법 |
US6407002B1 (en) * | 2000-08-10 | 2002-06-18 | Taiwan Semiconductor Manufacturing Company | Partial resist free approach in contact etch to improve W-filling |
US6511902B1 (en) * | 2002-03-26 | 2003-01-28 | Macronix International Co., Ltd. | Fabrication method for forming rounded corner of contact window and via by two-step light etching technique |
KR100914450B1 (ko) | 2002-12-28 | 2009-08-28 | 매그나칩 반도체 유한회사 | 반도체 소자의 금속 배선 형성 방법 |
-
2004
- 2004-07-12 KR KR1020040054062A patent/KR100607323B1/ko not_active IP Right Cessation
-
2005
- 2005-05-24 JP JP2005150606A patent/JP4443465B2/ja not_active Expired - Fee Related
- 2005-05-27 US US11/138,684 patent/US7101786B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20060009024A1 (en) | 2006-01-12 |
US7101786B2 (en) | 2006-09-05 |
KR100607323B1 (ko) | 2006-08-01 |
JP2006032912A (ja) | 2006-02-02 |
KR20060005176A (ko) | 2006-01-17 |
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