JP4443190B2 - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP4443190B2
JP4443190B2 JP2003371771A JP2003371771A JP4443190B2 JP 4443190 B2 JP4443190 B2 JP 4443190B2 JP 2003371771 A JP2003371771 A JP 2003371771A JP 2003371771 A JP2003371771 A JP 2003371771A JP 4443190 B2 JP4443190 B2 JP 4443190B2
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Japan
Prior art keywords
conductive
conductive path
semiconductor device
insulating resin
semiconductor element
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Expired - Fee Related
Application number
JP2003371771A
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English (en)
Japanese (ja)
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JP2004048077A (ja
JP2004048077A5 (https=
Inventor
則明 坂本
義幸 小林
純次 阪本
茂明 真下
克実 大川
栄寿 前原
幸嗣 高橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
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Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP2003371771A priority Critical patent/JP4443190B2/ja
Publication of JP2004048077A publication Critical patent/JP2004048077A/ja
Publication of JP2004048077A5 publication Critical patent/JP2004048077A5/ja
Application granted granted Critical
Publication of JP4443190B2 publication Critical patent/JP4443190B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/931—Shapes of bond pads
    • H10W72/932—Plan-view shape, i.e. in top view
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings

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  • Lead Frames For Integrated Circuits (AREA)
JP2003371771A 2003-10-31 2003-10-31 半導体装置の製造方法 Expired - Fee Related JP4443190B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2003371771A JP4443190B2 (ja) 2003-10-31 2003-10-31 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003371771A JP4443190B2 (ja) 2003-10-31 2003-10-31 半導体装置の製造方法

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP2000088831A Division JP3510839B2 (ja) 2000-03-28 2000-03-28 半導体装置およびその製造方法

Publications (3)

Publication Number Publication Date
JP2004048077A JP2004048077A (ja) 2004-02-12
JP2004048077A5 JP2004048077A5 (https=) 2007-03-22
JP4443190B2 true JP4443190B2 (ja) 2010-03-31

Family

ID=31712928

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003371771A Expired - Fee Related JP4443190B2 (ja) 2003-10-31 2003-10-31 半導体装置の製造方法

Country Status (1)

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JP (1) JP4443190B2 (https=)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100773482B1 (ko) 2006-10-09 2007-11-05 서동관 주입구가 구비된 포장백의 제조방법
KR100764684B1 (ko) 2006-11-01 2007-10-08 인티그런트 테크놀로지즈(주) 반도체 패키지 제조방법, 반도체 장치 및 그 제조방법

Also Published As

Publication number Publication date
JP2004048077A (ja) 2004-02-12

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