JP4308266B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
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Description
図1(a)〜(d)は、本発明の第1の実施形態に係る半導体装置の製造方法を示す概略的な断面図である。また、図2は、図1(c)に示される、個片化前の状態を示す概略的な平面図であり、図3は、図1(d)に示される、切断位置CUTを示す概略的な平面図である。なお、図1(c)は、図2をS1cーS1c線で切る断面に相当し、図1(d)は、図3をS1dーS1d線で切る断面に相当する。
図5(a)〜(d)は、本発明の第2の実施形態に係る半導体装置の製造方法を示す概略的な断面図である。また、図6は、図5(c)に示される、個片化前の状態を示す概略的な平面図であり、図7は、図5(d)に示される、切断位置CUTを示す概略的な平面図である。なお、図5(c)は、図6をS5cーS5c線で切る断面に相当し、図5(d)は、図7をS5dーS5d線で切る断面に相当する。
図9は、第2の実施形態に係る半導体装置の変形例を示す概略的な平面図である。図9において、図8(a)に示される構成と同一又は対応する構成には、同じ符号を付す。図9に示される半導体装置は、第2電極を構成する第2ポスト部(ダミーポスト部)24bの平面形状が、3つの角部において矩形であり、1つの角部において、扇形である点である。このような構成によっても、第2の実施形態の場合と同様の効果を得ることができる。上記以外の点において、図9の半導体装置は、上記第2の実施形態の半導体装置と同じである。
Claims (18)
- 半導体素子を有する基板と、
前記基板上に備えられた配線層と
を有する半導体装置であって、
前記配線層は、
前記基板上に備えられた封止用絶縁層と、
前記半導体素子に接続され、前記封止用絶縁層をその厚さ方向に貫通する複数の第1ポスト電極と、
前記封止用絶縁層をその厚さ方向に貫通する4個の第2ポスト電極と
を有し、
前記配線層の平面形状は、4個の辺と、隣合う2辺が交わる4個の角とを有する四角形であり、
前記四角形の外周部は、前記角を含む第2ポスト電極の形成領域である4個の角領域と、隣合う前記角領域の間の4個の辺領域とからなり、
前記4個の角領域は、該4個の角領域と同数である前記4個の第2ポスト電極によって、前記配線層の厚さ方向の全体に形成され、
前記4個の第2ポスト電極は、個々に独立した形状を有し、
前記4個の辺領域は、前記封止用絶縁層によって構成される
ことを特徴とする半導体装置。 - 前記4個の第2ポスト電極は、互いに同じ形状であることを特徴とする請求項1に記載の半導体装置。
- 前記4個の第2ポスト電極の内の一つの第2ポスト電極の形状は、他の第2ポスト電極の形状と異なることを特徴とする請求項1に記載の半導体装置。
- 前記基板は、
前記半導体素子を備えたウエハと、
前記ウエハ上に備えられた絶縁層と
を有することを特徴とする請求項1乃至3のいずれか1項に記載の半導体装置。 - 前記封止用絶縁層は、樹脂層であることを特徴とする請求項1乃至4のいずれか1項に記載の半導体装置。
- 前記複数の第1ポスト電極のそれぞれは、
前記基板上に形成された第1再配線部と、
前記第1再配線部上に備えられた第1ポスト部と
を有することを特徴とする請求項1乃至5のいずれか1項に記載の半導体装置。 - 前記4個の第2ポスト電極のそれぞれは、
前記基板上に形成された第2再配線部と、
前記第2再配線部上に備えられた第2ポスト部と
を有することを特徴とする請求項1乃至6のいずれか1項に記載の半導体装置。 - 前記第1ポスト電極及び前記第2ポスト電極は、同じ材料の金属によって構成されることを特徴とする請求項1乃至7のいずれか1項に記載の半導体装置。
- 前記第1ポスト電極及び前記第2ポスト電極は、銅によって構成されることを特徴とする請求項1乃至8のいずれか1項に記載の半導体装置。
- 前記4個の第2ポスト電極のそれぞれは、前記半導体素子及び前記複数の第1ポスト電極に電気的に非接続であることを特徴とする請求項1乃至9のいずれか1項に記載の半導体装置。
- 半導体素子を有する基板上に、封止用絶縁層と、前記半導体素子に接続され、前記封止用絶縁層を貫通する複数の第1ポスト電極と、前記封止用絶縁層を貫通する複数の第2ポスト電極とを有する配線層を形成するステップと、
前記配線層の平面形状が、4個の辺と、隣合う2辺が交わる4個の角とを有する四角形であり、前記四角形の外周部は、前記角を含む第2ポスト電極の形成領域である4個の角領域と、隣合う前記角領域の間の4個の辺領域とからなり、前記4個の角領域は、該4個の角領域と同数である前記4個の第2ポスト電極によって、前記配線層の厚さ方向の全体に形成され、前記4個の第2ポスト電極は、個々に独立した形状を有し、前記4個の辺領域は、前記封止用絶縁層によって構成されるように、前記基板及び前記配線層を切断するステップと
を有することを特徴とする半導体装置の製造方法。 - 前記4個の第2ポスト電極は、互いに同じ形状であることを特徴とする請求項11に記載の半導体装置の製造方法。
- 前記4個の第2ポスト電極の内の一つの第2ポスト電極の形状は、他の第2ポスト電極の形状と異なることを特徴とする請求項11に記載の半導体装置の製造方法。
- 前記基板は、
前記半導体素子を備えたウエハと、
前記ウエハ上に備えられた絶縁層と
を有することを特徴とする請求項11乃至13のいずれか1項に記載の半導体装置の製造方法。 - 前記配線層を形成するステップは、
前記基板上に、第1再配線部及び第2再配線部を形成し、前記第1再配線部及び前記第2再配線部上にそれぞれ、第1ポスト部及び第2ポスト部を形成することによって、前記第1再配線部及び前記第1ポスト部から成る前記第1ポスト電極と、前記第2再配線部及び前記第2ポスト部から成る前記第2ポスト電極を形成するステップと、
前記第1ポスト電極及び前記第2ポスト電極を覆う前記封止用絶縁層を形成するステップと、
前記封止用絶縁層の一部を除去することよって前記第1ポスト電極及び前記第2ポスト電極を露出させるステップと
を有することを特徴とする請求項11乃至14のいずれか1項に記載の半導体装置の製造方法。 - 前記第1ポスト電極及び前記第2ポスト電極は、同じ材料の金属によって構成されることを特徴とする請求項11乃至15のいずれか1項に記載の半導体装置の製造方法。
- 前記第1ポスト電極及び前記第2ポスト電極は、銅によって構成されることを特徴とする請求項11乃至16のいずれか1項に記載の半導体装置の製造方法。
- 前記4個の第2ポスト電極のそれぞれは、前記半導体素子及び前記複数の第1ポスト電極に電気的に非接続であることを特徴とする請求項11乃至17のいずれか1項に記載の製造方法。
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US8278769B2 (en) * | 2009-07-02 | 2012-10-02 | Avago Technologies Wireless Ip (Singapore) Pte. Ltd. | Compound semiconductor device and connectors |
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