JP4305286B2 - 計算機システム - Google Patents
計算機システム Download PDFInfo
- Publication number
- JP4305286B2 JP4305286B2 JP2004167936A JP2004167936A JP4305286B2 JP 4305286 B2 JP4305286 B2 JP 4305286B2 JP 2004167936 A JP2004167936 A JP 2004167936A JP 2004167936 A JP2004167936 A JP 2004167936A JP 4305286 B2 JP4305286 B2 JP 4305286B2
- Authority
- JP
- Japan
- Prior art keywords
- data
- data transfer
- memory
- signal
- controller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004167936A JP4305286B2 (ja) | 2004-06-07 | 2004-06-07 | 計算機システム |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2004167936A JP4305286B2 (ja) | 2004-06-07 | 2004-06-07 | 計算機システム |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22010698A Division JP3644265B2 (ja) | 1998-08-04 | 1998-08-04 | メモリサブシステム |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004295915A JP2004295915A (ja) | 2004-10-21 |
| JP2004295915A5 JP2004295915A5 (https=) | 2005-09-29 |
| JP4305286B2 true JP4305286B2 (ja) | 2009-07-29 |
Family
ID=33411328
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004167936A Expired - Fee Related JP4305286B2 (ja) | 2004-06-07 | 2004-06-07 | 計算機システム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4305286B2 (https=) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012194819A (ja) * | 2011-03-17 | 2012-10-11 | Mitsubishi Electric Corp | プログラム切替回路、および電子機器 |
-
2004
- 2004-06-07 JP JP2004167936A patent/JP4305286B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2004295915A (ja) | 2004-10-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US7808844B2 (en) | Methods and apparatus for improved memory access | |
| KR100382736B1 (ko) | 독출동작과 기입동작시 서로 다른 데이터율을 갖는 반도체메모리장치 및 이를 채용하는 시스템 | |
| JP4812976B2 (ja) | レジスタ、メモリモジュール及びメモリシステム | |
| JP4070051B2 (ja) | 半導体メモリ装置のデータマスキング方法とその回路、及び該回路を有する半導体メモリ装置 | |
| KR100396944B1 (ko) | 반도체 기억 장치 및 그를 이용한 메모리 시스템 | |
| US20140173322A1 (en) | Packet data id generation for serially interconnected devices | |
| US7668022B2 (en) | Integrated circuit for clock generation for memory devices | |
| US7965568B2 (en) | Semiconductor integrated circuit device and method of testing same | |
| US6806733B1 (en) | Multiple data rate interface architecture | |
| JP5232019B2 (ja) | 複数のプロセッサコア用の装置、システム、及び方法 | |
| US7504855B1 (en) | Multiple data rate memory interface architecture | |
| KR20060111465A (ko) | 2가지 모드의 데이터 스트로브를 구비한 집적 회로 | |
| CN1380746A (zh) | 具有单个时钟信号线的半导体存储器 | |
| KR20050061123A (ko) | Ddr sdram 콘트롤러의 데이터 제어회로 | |
| US6894531B1 (en) | Interface for a programmable logic device | |
| JP2005353168A (ja) | メモリインターフェース回路及びメモリインターフェース方法 | |
| JP3644265B2 (ja) | メモリサブシステム | |
| JP4305286B2 (ja) | 計算機システム | |
| CN114255806B (zh) | 数据通路接口电路、存储器和存储系统 | |
| KR100719146B1 (ko) | 직렬 입/출력 인터페이스를 가진 멀티 포트 메모리 소자 | |
| KR0164805B1 (ko) | 버스트 모드를 지원하는 내부 컬럼 어드레스 발생 회로 | |
| CN118899020B (zh) | 片上终结信号产生电路以及存储系统 | |
| JPH10340222A (ja) | メモリ装置の入力回路及び出力回路 | |
| US7269681B1 (en) | Arrangement for receiving and transmitting PCI-X data according to selected data modes | |
| JP4952177B2 (ja) | 記憶装置 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20050729 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20050729 |
|
| RD01 | Notification of change of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7421 Effective date: 20060421 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080513 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080711 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20080909 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20081105 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090120 |
|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090323 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20090407 |
|
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20090420 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120515 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120515 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130515 Year of fee payment: 4 |
|
| LAPS | Cancellation because of no payment of annual fees |