JP4266350B2 - テスト回路 - Google Patents

テスト回路 Download PDF

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Publication number
JP4266350B2
JP4266350B2 JP2004034549A JP2004034549A JP4266350B2 JP 4266350 B2 JP4266350 B2 JP 4266350B2 JP 2004034549 A JP2004034549 A JP 2004034549A JP 2004034549 A JP2004034549 A JP 2004034549A JP 4266350 B2 JP4266350 B2 JP 4266350B2
Authority
JP
Japan
Prior art keywords
signal
circuit
analog
output
test circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004034549A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005227057A (ja
JP2005227057A5 (OSRAM
Inventor
俊朗 樽井
勝 杉本
長也 森
輝彦 船倉
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2004034549A priority Critical patent/JP4266350B2/ja
Priority to US11/048,723 priority patent/US7079060B2/en
Publication of JP2005227057A publication Critical patent/JP2005227057A/ja
Publication of JP2005227057A5 publication Critical patent/JP2005227057A5/ja
Application granted granted Critical
Publication of JP4266350B2 publication Critical patent/JP4266350B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31924—Voltage or current aspects, e.g. driver, receiver
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/257—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques using analogue/digital converters of the type with comparison of different reference values with the value of voltage or current, e.g. using step-by-step method
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R29/00—Arrangements for measuring or indicating electric quantities not covered by groups G01R19/00 - G01R27/00
    • G01R29/02—Measuring characteristics of individual pulses, e.g. deviation from pulse flatness, rise time or duration
    • G01R29/027—Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values
    • G01R29/0276—Indicating that a pulse characteristic is either above or below a predetermined value or within or beyond a predetermined range of values the pulse characteristic being rise time

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Analogue/Digital Conversion (AREA)
JP2004034549A 2004-02-12 2004-02-12 テスト回路 Expired - Fee Related JP4266350B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2004034549A JP4266350B2 (ja) 2004-02-12 2004-02-12 テスト回路
US11/048,723 US7079060B2 (en) 2004-02-12 2005-02-03 Test circuit for evaluating characteristic of analog signal of device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004034549A JP4266350B2 (ja) 2004-02-12 2004-02-12 テスト回路

Publications (3)

Publication Number Publication Date
JP2005227057A JP2005227057A (ja) 2005-08-25
JP2005227057A5 JP2005227057A5 (OSRAM) 2006-09-28
JP4266350B2 true JP4266350B2 (ja) 2009-05-20

Family

ID=34836180

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004034549A Expired - Fee Related JP4266350B2 (ja) 2004-02-12 2004-02-12 テスト回路

Country Status (2)

Country Link
US (1) US7079060B2 (OSRAM)
JP (1) JP4266350B2 (OSRAM)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7856330B2 (en) * 2006-02-27 2010-12-21 Advantest Corporation Measuring apparatus, testing apparatus, and electronic device
US7554332B2 (en) * 2006-03-10 2009-06-30 Advantest Corporation Calibration apparatus, calibration method, testing apparatus, and testing method
US7525349B2 (en) * 2006-08-14 2009-04-28 University Of Washington Circuit for classifying signals
CN101688888B (zh) * 2007-06-07 2013-04-17 Abb技术有限公司 数字信号处理中的提高的可靠性
JP2010103737A (ja) * 2008-10-23 2010-05-06 Toshiba Corp Ａｄｃテスト回路
US8624764B2 (en) * 2011-02-11 2014-01-07 Analog Devices, Inc. Test circuits and methods for redundant electronic systems
TWI483555B (zh) * 2011-12-15 2015-05-01 Silicon Motion Inc 測試裝置以及類比至數位轉換器之測試方法
DE102013209309A1 (de) * 2013-05-21 2014-11-27 Zf Friedrichshafen Ag Verfahren und Schaltung zur Bewertung pulsweitenmodulierter Signale
DE102015116786A1 (de) * 2015-10-02 2017-04-06 Infineon Technologies Ag Vorrichtungsverfahren zum Testen eines Analog-Digital Wandlers
US11055255B2 (en) * 2019-04-25 2021-07-06 Realtek Semiconductor Corporation Interface connection apparatus and method
CN111858438B (zh) * 2019-04-30 2022-03-01 瑞昱半导体股份有限公司 接口连接装置与方法
TWI785952B (zh) * 2021-12-30 2022-12-01 新唐科技股份有限公司 密碼加速器以及加解密運算的差分故障分析方法
TWI827237B (zh) * 2022-09-06 2023-12-21 新唐科技股份有限公司 密碼加速器以及加解密運算防篡改方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4908621A (en) * 1988-07-06 1990-03-13 Tektronix, Inc. Autocalibrated multistage A/D converter
JP3144563B2 (ja) 1991-02-18 2001-03-12 横河電機株式会社 波形測定装置
JPH0514200A (ja) 1991-06-28 1993-01-22 Fuji Facom Corp 高精度化ａｄコンバータ
US5352976A (en) * 1992-01-31 1994-10-04 Tektronix, Inc. Multi-channel trigger dejitter
TW364950B (en) * 1996-06-17 1999-07-21 Koninkl Philips Electronics Nv Method of testing an analog-to-digital converter
JP2000292469A (ja) 1999-04-09 2000-10-20 Teratekku:Kk ジッタ測定装置
US6956422B2 (en) * 2003-03-17 2005-10-18 Indiana University Research And Technology Corporation Generation and measurement of timing delays by digital phase error compensation

Also Published As

Publication number Publication date
JP2005227057A (ja) 2005-08-25
US7079060B2 (en) 2006-07-18
US20050179576A1 (en) 2005-08-18

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