JP4258338B2 - 発光装置及び発光装置に用いる配線板、ならびに配線板の製造方法 - Google Patents
発光装置及び発光装置に用いる配線板、ならびに配線板の製造方法 Download PDFInfo
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- JP4258338B2 JP4258338B2 JP2003350284A JP2003350284A JP4258338B2 JP 4258338 B2 JP4258338 B2 JP 4258338B2 JP 2003350284 A JP2003350284 A JP 2003350284A JP 2003350284 A JP2003350284 A JP 2003350284A JP 4258338 B2 JP4258338 B2 JP 4258338B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Description
1A 絶縁基板1の第1主面
1B 絶縁基板1の第2主面
1C 絶縁基板1の貫通穴
2 導体膜
2a 第1リード
2b 第2リード
2 ダイパッド
3 発光素子
301 第1電極
302 第2電極
4 ボンディングワイヤ
5 接着材(ダイペースト)
6 めっき
7 外部端子
8 反射部材
8a 第1反射部材
8b 第2反射部材
9 透明樹脂
10 絶縁基板(ポリイミドテープ)
10A 絶縁基板10の第1主面
10B 絶縁基板10の第2主面
10C 絶縁基板10の貫通穴
11 反射膜
Claims (12)
- 第1電極及び第2電極が設けられた発光素子と、前記発光素子の第1電極と電気的に接続される第1リードと、前記発光素子の第2電極と電気的に接続される第2リードと、前記発光素子が発した光を反射させる反射部材とを備える発光装置であって、
前記発光素子は、フィルム状の絶縁基板の第1主面のみに前記第1リード及び第2リードを設けた配線板の、前記第1主面側に設けられており、
前記絶縁基板は、あらかじめ定められた位置に、前記第1主面からその裏面(以下、第2主面と称する)に貫通する貫通穴が設けられ、前記貫通穴の前記第1主面側の開口端は前記第1リードまたは第2リードでふさがれており、
前記貫通穴の内部には導電性部材が充填され、且つ前記導電性部材が前記貫通穴から前記絶縁基板の第2主面側に突出していることを特徴とする発光装置。 - 前記絶縁基板は、白色系絶縁体材料でなることを特徴とする請求項1に記載の発光装置。
- 前記絶縁基板は、液晶ポリマーでなることを特徴とする請求項1または請求項2に記載の発光装置。
- 前記絶縁基板の第1主面の、前記第1リード及び第2リードと重なる領域の外側の領域に、白色系絶縁体材料からなる反射膜が設けられていることを特徴とする請求項1に記載の発光装置。
- フィルム状の絶縁基板の第1主面のみに導体パターンを設け、前記絶縁基板の第1主面の裏面(以下、第2主面と称する)に、前記導体パターンと電気的に接続された外部端子を設けてなり、前記絶縁基板の第1主面上に発光素子を実装して発光装置を製造するときに用いる配線板であって、
前記導体パターンは、前記発光素子の第1電極と電気的に接続される第1リード、及び前記発光素子の第2電極と電気的に接続される第2リードからなり、
前記絶縁基板は、あらかじめ定められた位置に、前記第1主面から第2主面に貫通する貫通穴が設けられ、前記貫通穴の前記第1主面側の開口端は前記第1リードまたは第2リードでふさがれており、
前記貫通穴の内部には導電性部材が充填され、且つ前記導電性部材が前記貫通穴から前記絶縁基板の第2主面側に突出していることを特徴とする配線板。 - 前記絶縁基板は、白色系絶縁体材料でなることを特徴とする請求項5に記載の配線板。
- 前記絶縁基板は、液晶ポリマーでなることを特徴とする請求項5または請求項6に記載の配線板。
- 前記絶縁基板の第1主面の、前記第1リード及び第2リードと重なる領域の外側の領域に、白色系絶縁体材料からなる反射膜が設けられていることを特徴とする請求項5に記載の配線板。
- 絶縁基板の第1主面に導体パターンを形成する工程と、前記絶縁基板の第1主面の裏面(以下、第2主面と称する)に前記導体パターンと電気的に接続された外部端子を形成する工程とを有し、前記絶縁基板の第1主面上に発光素子を搭載して発光装置を製造するときに用いる配線板の製造方法であって、
絶縁基板の第1主面のみに導体膜を形成する工程と、
前記絶縁基板に、前記第1主面から前記第2主面に貫通する貫通穴を形成する工程と、
前記貫通穴の内部に導電性部材を充填する工程と、
前記絶縁基板の第1主面に形成した導体膜の不要な部分を除去して、前記発光素子の第1電極と電気的に接続される第1リード及び前記発光素子の第2電極と電気的に接続される第2リードを形成する工程とを有し、
前記導電性部材を充填する工程は、前記導電性部材を前記貫通穴から前記第2主面側に突出させることを特徴とする配線板の製造方法。 - 前記絶縁基板は、白色系絶縁体材料を用いることを特徴とする請求項9に記載の配線板の製造方法。
- 前記絶縁基板は、液晶ポリマーを用いることを特徴とする請求項9または請求項10に記載の配線板の製造方法。
- 前記第1リード及び第2リードを形成する工程の後、前記絶縁基板の第1主面の、前記第1リードあるいは第2リードと重なる領域の外側の領域に、白色系絶縁体材料を塗布する工程を有することを特徴とする請求項9に記載の配線板の製造方法。
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JP2003350284A JP4258338B2 (ja) | 2003-10-09 | 2003-10-09 | 発光装置及び発光装置に用いる配線板、ならびに配線板の製造方法 |
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Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
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JP5047509B2 (ja) * | 2006-03-01 | 2012-10-10 | オンセミコンダクター・トレーディング・リミテッド | 半導体装置 |
JP5453713B2 (ja) * | 2007-07-06 | 2014-03-26 | 日亜化学工業株式会社 | 半導体装置およびその形成方法 |
KR101104034B1 (ko) | 2007-12-06 | 2012-01-09 | 엘지이노텍 주식회사 | 발광다이오드, 발광장치 및 그 제조방법 |
JP5495495B2 (ja) * | 2008-02-18 | 2014-05-21 | シチズン電子株式会社 | 表面実装型発光ダイオード |
US7989824B2 (en) * | 2009-06-03 | 2011-08-02 | Koninklijke Philips Electronics N.V. | Method of forming a dielectric layer on a semiconductor light emitting device |
JP2011134961A (ja) * | 2009-12-25 | 2011-07-07 | Hitachi Chem Co Ltd | 半導体装置、半導体素子搭載接続用配線基材、半導体装置搭載配線板及びそれらの製造法 |
JP2013045943A (ja) * | 2011-08-25 | 2013-03-04 | Citizen Holdings Co Ltd | 半導体発光装置及びその製造方法 |
JP6293995B2 (ja) * | 2012-03-23 | 2018-03-14 | 新光電気工業株式会社 | 発光素子搭載用パッケージ及びその製造方法、並びに発光素子パッケージ |
KR101333987B1 (ko) * | 2012-07-10 | 2013-11-27 | 하이디스 테크놀로지 주식회사 | 연성회로기판에 실장된 led 패키지와 배선구조 |
JP6244130B2 (ja) * | 2013-07-26 | 2017-12-06 | 新光電気工業株式会社 | 発光素子搭載用パッケージ及び発光素子パッケージ |
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JPS6125270Y2 (ja) * | 1980-05-26 | 1986-07-29 | ||
JP3246927B2 (ja) * | 1991-09-17 | 2002-01-15 | 電気化学工業株式会社 | フレキシブルマトリックス回路基板及び表示板 |
JPH07121123A (ja) * | 1993-08-31 | 1995-05-12 | Sanyo Electric Co Ltd | 表示装置 |
JP3625498B2 (ja) * | 1994-09-21 | 2005-03-02 | 三洋電機株式会社 | 表示装置 |
JPH11161197A (ja) * | 1997-11-25 | 1999-06-18 | Matsushita Electric Ind Co Ltd | 画像表示装置 |
JP3261613B2 (ja) * | 1997-12-08 | 2002-03-04 | ローム株式会社 | 表示装置、およびこれが実装されたマザーボード |
JP2001352102A (ja) * | 2000-06-07 | 2001-12-21 | Matsushita Electric Ind Co Ltd | 光半導体装置 |
JP4737842B2 (ja) * | 2001-01-30 | 2011-08-03 | 京セラ株式会社 | 発光素子収納用パッケージの製造方法 |
JP4138261B2 (ja) * | 2001-02-21 | 2008-08-27 | 日本ライツ株式会社 | 光源装置 |
JP4013560B2 (ja) * | 2002-01-25 | 2007-11-28 | 松下電器産業株式会社 | 発光装置 |
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