JP4215844B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP4215844B2
JP4215844B2 JP30284297A JP30284297A JP4215844B2 JP 4215844 B2 JP4215844 B2 JP 4215844B2 JP 30284297 A JP30284297 A JP 30284297A JP 30284297 A JP30284297 A JP 30284297A JP 4215844 B2 JP4215844 B2 JP 4215844B2
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JP
Japan
Prior art keywords
address
data
page
diagonal
memory array
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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JP30284297A
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English (en)
Japanese (ja)
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JPH11144451A (ja
JPH11144451A5 (enExample
Inventor
征史 橋本
Original Assignee
日本テキサス・インスツルメンツ株式会社
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Application filed by 日本テキサス・インスツルメンツ株式会社 filed Critical 日本テキサス・インスツルメンツ株式会社
Priority to JP30284297A priority Critical patent/JP4215844B2/ja
Priority to US09/185,685 priority patent/US6115323A/en
Publication of JPH11144451A publication Critical patent/JPH11144451A/ja
Publication of JPH11144451A5 publication Critical patent/JPH11144451A5/ja
Application granted granted Critical
Publication of JP4215844B2 publication Critical patent/JP4215844B2/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Memory System (AREA)
JP30284297A 1997-11-05 1997-11-05 半導体記憶装置 Expired - Fee Related JP4215844B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP30284297A JP4215844B2 (ja) 1997-11-05 1997-11-05 半導体記憶装置
US09/185,685 US6115323A (en) 1997-11-05 1998-11-04 Semiconductor memory device for storing data with efficient page access of data lying in a diagonal line of a two-dimensional data construction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30284297A JP4215844B2 (ja) 1997-11-05 1997-11-05 半導体記憶装置

Publications (3)

Publication Number Publication Date
JPH11144451A JPH11144451A (ja) 1999-05-28
JPH11144451A5 JPH11144451A5 (enExample) 2005-07-07
JP4215844B2 true JP4215844B2 (ja) 2009-01-28

Family

ID=17913761

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30284297A Expired - Fee Related JP4215844B2 (ja) 1997-11-05 1997-11-05 半導体記憶装置

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US (1) US6115323A (enExample)
JP (1) JP4215844B2 (enExample)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4535563B2 (ja) * 2000-04-28 2010-09-01 ルネサスエレクトロニクス株式会社 半導体記憶装置
US6853382B1 (en) 2000-10-13 2005-02-08 Nvidia Corporation Controller for a memory system having multiple partitions
KR100927760B1 (ko) * 2002-01-11 2009-11-20 소니 가부시끼 가이샤 메모리 셀 회로, 메모리 장치, 움직임 벡터 검출 장치 및움직임 보상 예측 부호화 장치
ATE378619T1 (de) * 2002-02-27 2007-11-15 Cdm Optics Inc Optimierte bildverarbeitung für wellenfrontkodierte abbildungssysteme
JP2003263650A (ja) * 2002-03-12 2003-09-19 Sony Corp 画像処理装置およびその方法
JP2006523358A (ja) * 2003-03-20 2006-10-12 コーニンクレッカ　フィリップス　エレクトロニクス　エヌ　ヴィ 異なるメモリセルに対する同時読み取りおよび書き込み
US7286134B1 (en) 2003-12-17 2007-10-23 Nvidia Corporation System and method for packing data in a tiled graphics memory
US7420568B1 (en) 2003-12-17 2008-09-02 Nvidia Corporation System and method for packing data in different formats in a tiled graphics memory
US6999088B1 (en) * 2003-12-23 2006-02-14 Nvidia Corporation Memory system having multiple subpartitions
JP2005267719A (ja) * 2004-03-17 2005-09-29 Sanyo Electric Co Ltd 符号化装置
US7227548B2 (en) * 2004-05-07 2007-06-05 Valve Corporation Method and system for determining illumination of models using an ambient cube
KR100682174B1 (ko) 2005-05-18 2007-02-13 주식회사 하이닉스반도체 반도체 메모리 장치의 페이지 액세스 회로
JP2007095222A (ja) * 2005-09-30 2007-04-12 Eastman Kodak Co 半導体メモリ及びそのメモリコントローラ
JP2009238323A (ja) 2008-03-27 2009-10-15 Fujitsu Microelectronics Ltd 半導体記憶装置、画像処理システムおよび画像処理方法
US8319783B1 (en) 2008-12-19 2012-11-27 Nvidia Corporation Index-based zero-bandwidth clears
US8330766B1 (en) 2008-12-19 2012-12-11 Nvidia Corporation Zero-bandwidth clears
US9910790B2 (en) * 2013-12-12 2018-03-06 Intel Corporation Using a memory address to form a tweak key to use to encrypt and decrypt data
US11403173B2 (en) * 2015-04-30 2022-08-02 Marvell Israel (M.I.S.L) Ltd. Multiple read and write port memory
US10817420B2 (en) * 2018-10-30 2020-10-27 Arm Limited Apparatus and method to access a memory location

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0757002B2 (ja) * 1982-10-05 1995-06-14 キヤノン株式会社 画像処理装置
WO1992020033A1 (en) * 1991-04-24 1992-11-12 Michael Sussman Digital document magnifier
JP3394067B2 (ja) * 1993-04-13 2003-04-07 株式会社日立国際電気 画像発生装置
US5638128A (en) * 1994-11-08 1997-06-10 General Instrument Corporation Of Delaware Pixel interpolation filters for video decompression processor

Also Published As

Publication number Publication date
US6115323A (en) 2000-09-05
JPH11144451A (ja) 1999-05-28

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