JP4195056B2 - 多層印刷回路基板およびその製造方法 - Google Patents
多層印刷回路基板およびその製造方法 Download PDFInfo
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- JP4195056B2 JP4195056B2 JP2006346159A JP2006346159A JP4195056B2 JP 4195056 B2 JP4195056 B2 JP 4195056B2 JP 2006346159 A JP2006346159 A JP 2006346159A JP 2006346159 A JP2006346159 A JP 2006346159A JP 4195056 B2 JP4195056 B2 JP 4195056B2
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
- H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
- H05K3/182—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating characterised by the patterning method
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
- H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0104—Tools for processing; Objects used during processing for patterning or coating
- H05K2203/013—Inkjet printing, e.g. for printing insulating material or resist
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/05—Patterning and lithography; Masks; Details of resist
- H05K2203/0562—Details of resist
- H05K2203/0565—Resist used only for applying catalyst, not for plating itself
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/07—Treatments involving liquids, e.g. plating, rinsing
- H05K2203/0703—Plating
- H05K2203/0709—Catalytic ink or adhesive for electroless plating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
- H05K3/389—Improvement of the adhesion between the insulating substrate and the metal by the use of a coupling agent, e.g. silane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/421—Blind plated via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/422—Plated through-holes or plated via connections characterised by electroless plating method; pretreatment therefor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Laminated Bodies (AREA)
Description
103 自己組織膜(SAM)
105 非接着膜
107 マイクロホール
109 触媒粒子
110,120 触媒回路パターン
112 静電吸着フィルム
1091 金属膜
1101,1201 金属回路
200 両面PCB
203 自己組織膜(SAM)
205 非接着膜
206,207,208 マイクロホール
209 触媒粒子
210,220 触媒回路パターン
240 絶縁層
2061 隠れホール
2071 埋込みホール
2081 スルーホール
2101,2201 金属回路
Claims (25)
- 印刷回路基板(PCB)を製造する方法であって、
基板を用意すること、
第1の自己組織膜(SAM)を、基板の少なくとも一方の面に形成すること、
非接着性の膜を、第1のSAMの上に形成すること、
少なくとも1つのマイクロホールを基板に形成すること、
第2のSAMをマイクロホール表面に形成すること、
触媒粒子を、前記基板の少なくとも一方の面およびマイクロホール表面に供給すること、および
触媒回路パターンを基板上に形成すること、を含む方法。 - 基板を電解質に浸漬して、金属回路を基板に形成し、金属膜をマイクロホールに形成すること、をさらに含む請求項1記載の方法。
- 基板を、促進剤溶液に浸漬することをさらに含む請求項1記載の方法。
- 基板を、第1の高分子電解質溶液の中に浸漬すること、
基板を、第1の高分子電解質溶液とは反対の電荷を有する第2の高分子電解質溶液の中に浸漬すること、および
基板を、第1の高分子電解質溶液とは同じ電荷を有する第3の高分子電解質溶液の中に浸漬すること、を含む請求項1記載の方法。 - マイクロホールを形成するステップは、基板を孔加工してマイクロホールを形成すること、を含む請求項1記載の方法。
- 多層の印刷回路基板(PCB)を製造する方法であって、
基板を用意すること、
自己組織膜(SAM)を基板の各面に形成すること、
非接着性の膜をSAMの上に形成すること、
少なくとも1つのマイクロホールを基板に形成すること、
SAMをマイクロホール表面に形成すること、
触媒粒子を、基板の少なくとも一方の面およびマイクロホール表面に塗布すること、
触媒マイクロ供給および促進剤溶液浸漬によって、触媒回路パターンを基板上に形成すること、および
基板を電解液に浸漬して、金属回路を基板上に形成し、金属膜をマイクロホール内に形成すること、を含む方法。 - 絶縁層を、両面PCBの少なくとも一方の面に接着すること、および
両面PCBを形成するステップを1回繰り返して、多層PCBを形成すること、を含む請求項6記載の方法。 - マイクロホールを形成するステップは、基板を孔加工してマイクロホールを形成すること、を含む請求項6記載の方法。
- 孔加工ステップは、多層PCBの埋込みホール、隠れホールまたはスルーホールを形成する請求項8記載の方法。
- 自己組織膜(SAM)を形成するステップは、導電表面処理プロセスを含み、
該プロセスは、基板を、第1の高分子電解質溶液の中に浸漬すること、
基板を、第1の高分子電解質溶液とは反対の電荷を有する第2の高分子電解質溶液の中に浸漬すること、および
基板を、第1の高分子電解質溶液とは同じ電荷を有する第3の高分子電解質溶液の中に浸漬すること、を含む請求項6記載の方法。 - 触媒は、パラジウム塩触媒またはプラチナ塩触媒を含む請求項6記載の方法。
- 少なくとも1つのマイクロホールを有する基板と、
基板の少なくとも一方の面において、マイクロホール表面に形成された自己組織膜(SAM)と、
該マイクロホール表面に形成された触媒層と、
触媒層とともに、マイクロホール表面に形成された金属膜と、
SAMの上に形成された第1回路とを備える両面印刷回路基板。 - SAMは、陰イオンおよび陽イオンの高分子電解質溶液により形成された層をさらに含む請求項12記載の両面印刷回路基板。
- 陰イオンの高分子電解質溶液は、ポリアクリル酸(PAA)、ポリメタクリル酸(PMA)、ポリ(スチレンスルホナート)(PSS)、ポリ(3−チオフェン酢酸)(PTAA)またはこれらの何れかの組合せからなるグループから選択される請求項13記載の両面印刷回路基板。
- 陽イオンの高分子電解質溶液は、ポリアリルアミン塩酸塩(PAH)、ポリビニルアルコール(PVA)、ポリビニルイミダゾール(PVI+)、ポリ(ビニルピロリドン)(PVP+)、ポリアニリン(PAN)またはこれらの何れかの組合せからなるグループから選択される請求項13記載の両面印刷回路基板。
- 触媒は、触媒含有金属塩を含む請求項12記載の両面印刷回路基板。
- 第1回路の上に、静電吸着フィルムをさらに備える請求項12記載の両面印刷回路基板。
- 第1回路は、触媒回路を含む請求項12記載の両面印刷回路基板。
- 少なくとも1つのマイクロホールを有する第1基板と、
第1基板の各面において、マイクロホール表面に形成された第1自己組織膜(SAM)と、
該マイクロホール表面に形成された第1触媒層と、
介在した第1触媒層とともにマイクロホール表面に形成された第1金属膜と、
介在した第1SAMとともに第1基板の一方の面に形成された第1回路と、
介在した第1SAMとともに第1基板の他方の面に形成された第2回路とを備える多層印刷回路基板(PCB)。 - 第1基板の一方の面に接着し、少なくとも1つのマイクロホールを有する第2基板と、
第2基板の一方の面において、マイクロホール表面に形成された第2自己組織膜(SAM)と、
第2基板でのマイクロホール表面に形成された第2触媒層と、
第2基板でのマイクロホール表面に形成された第2金属膜とをさらに備える請求項19記載の多層印刷回路基板。 - 介在した第2SAMとともに第2基板の面に形成された第3回路とをさらに備える請求項20記載の多層印刷回路基板。
- 各第1および第2SAMは、陰イオンおよび陽イオンの高分子電解質溶液で形成された層をさらに含む請求項20記載の多層印刷回路基板。
- マイクロホールは、埋込みホールである請求項19記載の多層印刷回路基板。
- マイクロホールは、隠れホールである請求項19記載の多層印刷回路基板。
- マイクロホールは、スルーホールである請求項19記載の多層印刷回路基板。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW94147547 | 2005-12-30 |
Publications (2)
Publication Number | Publication Date |
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JP2007184592A JP2007184592A (ja) | 2007-07-19 |
JP4195056B2 true JP4195056B2 (ja) | 2008-12-10 |
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JP2006346159A Active JP4195056B2 (ja) | 2005-12-30 | 2006-12-22 | 多層印刷回路基板およびその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (2) | US7834274B2 (ja) |
JP (1) | JP4195056B2 (ja) |
KR (1) | KR100885701B1 (ja) |
DE (1) | DE102006059159A1 (ja) |
TW (1) | TWI328416B (ja) |
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JP2004342741A (ja) | 2003-05-14 | 2004-12-02 | Seiko Epson Corp | 膜形成方法、配線形成方法、電気光学装置の製造方法、電気光学装置、電子機器 |
JP2005057140A (ja) | 2003-08-06 | 2005-03-03 | Seiko Epson Corp | 多層配線基板とその製造方法 |
TWI275333B (en) * | 2003-12-05 | 2007-03-01 | Ind Tech Res Inst | Method for forming metal wire by microdispensing |
TWI255491B (en) * | 2004-03-31 | 2006-05-21 | Sanyo Electric Co | Substrate for mounting elements, manufacturing method therefor and semiconductor device using the same |
KR100601493B1 (ko) * | 2004-12-30 | 2006-07-18 | 삼성전기주식회사 | 하프에칭된 본딩 패드 및 절단된 도금 라인을 구비한bga 패키지 및 그 제조 방법 |
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2006
- 2006-10-31 US US11/554,882 patent/US7834274B2/en active Active
- 2006-12-01 KR KR1020060120848A patent/KR100885701B1/ko active IP Right Grant
- 2006-12-14 DE DE102006059159A patent/DE102006059159A1/de not_active Ceased
- 2006-12-15 TW TW095147280A patent/TWI328416B/zh not_active IP Right Cessation
- 2006-12-22 JP JP2006346159A patent/JP4195056B2/ja active Active
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2010
- 2010-10-12 US US12/902,518 patent/US20110023297A1/en not_active Abandoned
Also Published As
Publication number | Publication date |
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DE102006059159A1 (de) | 2007-07-12 |
JP2007184592A (ja) | 2007-07-19 |
KR20070072361A (ko) | 2007-07-04 |
TW200740337A (en) | 2007-10-16 |
US7834274B2 (en) | 2010-11-16 |
KR100885701B1 (ko) | 2009-02-26 |
TWI328416B (en) | 2010-08-01 |
US20070153488A1 (en) | 2007-07-05 |
US20110023297A1 (en) | 2011-02-03 |
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