JP4178083B2 - 半導体装置及びその超音波ボンディング方法 - Google Patents
半導体装置及びその超音波ボンディング方法 Download PDFInfo
- Publication number
- JP4178083B2 JP4178083B2 JP2003273808A JP2003273808A JP4178083B2 JP 4178083 B2 JP4178083 B2 JP 4178083B2 JP 2003273808 A JP2003273808 A JP 2003273808A JP 2003273808 A JP2003273808 A JP 2003273808A JP 4178083 B2 JP4178083 B2 JP 4178083B2
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- JP
- Japan
- Prior art keywords
- semiconductor device
- groove
- bump electrode
- semiconductor
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0555—Shape
- H01L2224/05556—Shape in side view
- H01L2224/05557—Shape in side view comprising protrusions or indentations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13016—Shape in side view
- H01L2224/13018—Shape in side view comprising protrusions or indentations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13026—Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body
- H01L2224/13027—Disposition relative to the bonding area, e.g. bond pad, of the semiconductor or solid-state body the bump connector being offset with respect to the bonding area, e.g. bond pad
Landscapes
- Wire Bonding (AREA)
Description
Claims (2)
- バンプ電極を備えた半導体装置において、
前記バンプ電極が形成される半導体層に、単数又は複数の溝が設けられ、該溝の側壁の少なくとも一部は、逆テーパー形状であって、前記半導体層はGaAs層よりなり、前記GaAs層表面の結晶面が(100)面であり、前記溝の側壁の少なくとも一部は、前記GaAs層の結晶性を利用して形成された逆テーパー形状であることを特徴とする半導体装置。 - バンプ電極を備えた半導体装置を実装基板に接着する半導体装置の超音波ボンディング方法において、
前記半導体装置は、バンプ電極が形成される半導体層に、単数又は複数の溝が設けられ、該溝の側壁の少なくとも一部は、逆テーパー形状であって、前記半導体層はGaAs層よりなり、前記GaAs層表面の結晶面が(100)面であり、前記溝の側壁の少なくとも一部は、前記GaAs層の結晶性を利用して形成された逆テーパー形状であり、該面に直交する方向に超音波振動を加えてボンディングを行なうことを特徴とする半導体装置の超音波ボンディング方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003273808A JP4178083B2 (ja) | 2003-07-14 | 2003-07-14 | 半導体装置及びその超音波ボンディング方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003273808A JP4178083B2 (ja) | 2003-07-14 | 2003-07-14 | 半導体装置及びその超音波ボンディング方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005033147A JP2005033147A (ja) | 2005-02-03 |
JP4178083B2 true JP4178083B2 (ja) | 2008-11-12 |
Family
ID=34210938
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003273808A Expired - Fee Related JP4178083B2 (ja) | 2003-07-14 | 2003-07-14 | 半導体装置及びその超音波ボンディング方法 |
Country Status (1)
Country | Link |
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JP (1) | JP4178083B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100691151B1 (ko) | 2005-02-24 | 2007-03-09 | 삼성전기주식회사 | 솔더범프 앵커시스템 |
JP5611682B2 (ja) * | 2010-06-21 | 2014-10-22 | 京セラ株式会社 | 弾性波装置 |
-
2003
- 2003-07-14 JP JP2003273808A patent/JP4178083B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
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JP2005033147A (ja) | 2005-02-03 |
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