JP4481065B2 - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP4481065B2 JP4481065B2 JP2004115482A JP2004115482A JP4481065B2 JP 4481065 B2 JP4481065 B2 JP 4481065B2 JP 2004115482 A JP2004115482 A JP 2004115482A JP 2004115482 A JP2004115482 A JP 2004115482A JP 4481065 B2 JP4481065 B2 JP 4481065B2
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- 239000004065 semiconductor Substances 0.000 title claims description 62
- 238000004519 manufacturing process Methods 0.000 title claims description 26
- 238000000034 method Methods 0.000 claims description 29
- 229910001111 Fine metal Inorganic materials 0.000 claims description 28
- 239000002184 metal Substances 0.000 claims description 23
- 229910052751 metal Inorganic materials 0.000 claims description 23
- 239000000523 sample Substances 0.000 claims description 9
- 239000011229 interlayer Substances 0.000 claims description 7
- 238000007789 sealing Methods 0.000 claims description 7
- 239000011347 resin Substances 0.000 claims description 6
- 229920005989 resin Polymers 0.000 claims description 6
- 239000010949 copper Substances 0.000 description 114
- 239000010410 layer Substances 0.000 description 12
- 239000003963 antioxidant agent Substances 0.000 description 9
- 230000003078 antioxidant effect Effects 0.000 description 9
- 238000009792 diffusion process Methods 0.000 description 8
- 230000003064 anti-oxidating effect Effects 0.000 description 6
- 230000004888 barrier function Effects 0.000 description 6
- 238000001312 dry etching Methods 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- QPLDLSVMHZLSFG-UHFFFAOYSA-N Copper oxide Chemical compound [Cu]=O QPLDLSVMHZLSFG-UHFFFAOYSA-N 0.000 description 3
- 239000005751 Copper oxide Substances 0.000 description 3
- 229910000431 copper oxide Inorganic materials 0.000 description 3
- 230000001681 protective effect Effects 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000032798 delamination Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
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Description
また、Cuパッド上の絶縁膜のみドライエッチングにより薄膜化し、プローブ針を薄膜化した絶縁膜に当てることによりCuパッドを覆っている絶縁膜を一部分除去するので、Cuパッド上に成膜される絶縁膜を破壊する起点をつくるため絶縁膜の一部分を除去することを既存のプローブ針を用いて実現できる。この際、Cuパッド上のみ加工する工程でドライエッチングを用いてCuパッド上の領域に存在する絶縁膜のみ薄膜化することにより絶縁膜の強度を低下させ、絶縁膜の一部分除去が容易になる。
また、Cuパッド上の絶縁膜表面に凸部を設けることで、Cuパッドを覆っている絶縁膜を一部分除去する際には、凸部が折れることにより絶縁膜が壊れ、絶縁膜の一部分の除去が容易になる。
2 Cuパッド
3 絶縁膜
4 絶縁膜の凹部
5 Auボール
6 外部端子溝
7 Cu膜
8 プローブ針
9 キャピラリー
10 Auワイヤ
11 絶縁膜の凸部
Claims (3)
- 半導体素子にCuパッドからなる外部端子を形成する工程と、
前記半導体素子をインターポーザに搭載する工程と、
前記Cuパッドと金属細線を接合する工程と、
前記Cuパッドと前記インターポーザの端子を前記金属細線により接続する工程と、
前記半導体素子と前記金属細線を封止樹脂で覆う工程と
を含む半導体装置の製造方法であって、
前記外部端子を形成する工程で前記Cuパッドを絶縁膜で覆い、
前記Cuパッドと前記金属細線を接合する工程で前記Cuパッド上の前記絶縁膜のみ薄膜化し、プローブ針を薄膜化した前記絶縁膜に当てることにより前記Cuパッドを覆っている前記絶縁膜を一部分除去した後、
前記Cuパッドに前記金属細線を接合する
ことを特徴とする半導体装置の製造方法。 - 半導体素子にCuパッドからなる外部端子を形成する工程と、
前記半導体素子をインターポーザに搭載する工程と、
前記Cuパッドと金属細線を接合する工程と、
前記Cuパッドと前記インターポーザの端子を前記金属細線により接続する工程と、
前記半導体素子と前記金属細線を封止樹脂で覆う工程と
を含む半導体装置の製造方法であって、
前記外部端子を形成する工程で前記Cuパッドを絶縁膜で覆い、
前記Cuパッドと前記金属細線を接合する工程で前記Cuパッド上の前記絶縁膜表面に凸部を形成し、前記絶縁膜を一部分除去した後、
前記Cuパッドに前記金属細線を接合する
ことを特徴とする半導体装置の製造方法。 - 前記外部端子を形成する工程は、
半導体素子の層間絶縁膜に外部端子溝を形成する工程と、
前記外部端子溝にCu膜を埋め込む工程と、
前記Cu膜を平坦化しCuパッドを形成する工程と、
前記Cuパッド上を含む前記半導体素子上に絶縁膜を成膜する工程と
からなる請求項1、2のいずれか1項に記載の半導体装置の製造方法。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004115482A JP4481065B2 (ja) | 2004-04-09 | 2004-04-09 | 半導体装置の製造方法 |
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Application Number | Priority Date | Filing Date | Title |
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JP2004115482A JP4481065B2 (ja) | 2004-04-09 | 2004-04-09 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
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JP2005302941A JP2005302941A (ja) | 2005-10-27 |
JP4481065B2 true JP4481065B2 (ja) | 2010-06-16 |
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JP2004115482A Expired - Lifetime JP4481065B2 (ja) | 2004-04-09 | 2004-04-09 | 半導体装置の製造方法 |
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Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011249491A (ja) * | 2010-05-26 | 2011-12-08 | Mitsubishi Electric Corp | 電力用半導体装置 |
JP5978587B2 (ja) * | 2011-10-13 | 2016-08-24 | 日立化成株式会社 | 半導体パッケージ及びその製造方法 |
JP2013118310A (ja) * | 2011-12-05 | 2013-06-13 | Jjtech Co Ltd | 半導体装置 |
US20200273716A1 (en) * | 2017-07-07 | 2020-08-27 | Mitsubishi Electric Corporation | Semiconductor device and method for manufacturing semiconductor device |
-
2004
- 2004-04-09 JP JP2004115482A patent/JP4481065B2/ja not_active Expired - Lifetime
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