JP4112717B2 - データ処理装置 - Google Patents

データ処理装置 Download PDF

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Publication number
JP4112717B2
JP4112717B2 JP35081198A JP35081198A JP4112717B2 JP 4112717 B2 JP4112717 B2 JP 4112717B2 JP 35081198 A JP35081198 A JP 35081198A JP 35081198 A JP35081198 A JP 35081198A JP 4112717 B2 JP4112717 B2 JP 4112717B2
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JP
Japan
Prior art keywords
transmission
reception
response packet
packet
information
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP35081198A
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English (en)
Japanese (ja)
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JP2000174786A (ja
JP2000174786A5 (enExample
Inventor
篤 竹上
満 島田
祥子 小田
伸一郎 生駒
Original Assignee
日本テキサス・インスツルメンツ株式会社
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Publication date
Application filed by 日本テキサス・インスツルメンツ株式会社 filed Critical 日本テキサス・インスツルメンツ株式会社
Priority to JP35081198A priority Critical patent/JP4112717B2/ja
Priority to US09/458,595 priority patent/US6604154B1/en
Publication of JP2000174786A publication Critical patent/JP2000174786A/ja
Publication of JP2000174786A5 publication Critical patent/JP2000174786A5/ja
Application granted granted Critical
Publication of JP4112717B2 publication Critical patent/JP4112717B2/ja
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Expired - Fee Related legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
    • G06F13/4221—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus
    • G06F13/4226—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being an input/output bus, e.g. ISA bus, EISA bus, PCI bus, SCSI bus with asynchronous protocol

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Small-Scale Networks (AREA)
  • Information Transfer Systems (AREA)
JP35081198A 1998-12-10 1998-12-10 データ処理装置 Expired - Fee Related JP4112717B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP35081198A JP4112717B2 (ja) 1998-12-10 1998-12-10 データ処理装置
US09/458,595 US6604154B1 (en) 1998-12-10 1999-12-10 Data processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP35081198A JP4112717B2 (ja) 1998-12-10 1998-12-10 データ処理装置

Publications (3)

Publication Number Publication Date
JP2000174786A JP2000174786A (ja) 2000-06-23
JP2000174786A5 JP2000174786A5 (enExample) 2005-12-02
JP4112717B2 true JP4112717B2 (ja) 2008-07-02

Family

ID=18413044

Family Applications (1)

Application Number Title Priority Date Filing Date
JP35081198A Expired - Fee Related JP4112717B2 (ja) 1998-12-10 1998-12-10 データ処理装置

Country Status (2)

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US (1) US6604154B1 (enExample)
JP (1) JP4112717B2 (enExample)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10030158A1 (de) * 2000-06-20 2002-01-03 Bayerische Motoren Werke Ag Steuergerät mit einem Hauptmikroprozessor und mit einer Prozessorschnittstelle zu einer Bus-Sende-Empfangseinheit
JP4604354B2 (ja) * 2001-01-17 2011-01-05 ソニー株式会社 情報入出力装置
US20020129183A1 (en) * 2001-03-08 2002-09-12 James David Vernon Method of enhancing flow control in a data bus system by eliminating an acknowledge packet during a response phase to indicate a flow control condition
JP3633507B2 (ja) * 2001-05-25 2005-03-30 ソニー株式会社 データ転送処理装置、データ転送方法およびデータ転送プログラム
AU2003226128A1 (en) * 2002-03-27 2003-10-13 First Virtual Communications System and method for traversing firewalls with protocol communications
JP2005174306A (ja) * 2003-11-20 2005-06-30 Omron Corp 通信インタフェースおよびネットワークシステムならびにプログラマブルコントローラ
JP4683120B2 (ja) 2008-11-28 2011-05-11 日本テキサス・インスツルメンツ株式会社 電子機器および通信方法
US9304902B2 (en) 2013-03-15 2016-04-05 Saratoga Speed, Inc. Network storage system using flash storage
US9672180B1 (en) 2014-08-06 2017-06-06 Sanmina Corporation Cache memory management system and method
US11481268B2 (en) * 2020-08-03 2022-10-25 International Business Machines Corporation Blockchain management of provisioning failures

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69218644T2 (de) * 1991-01-30 1997-09-11 Canon Kk Kontrollverfahren und Vorrichtung der Verbindung zwischen Mikrocomputer(n) und einem Zentralrechner
JP3810449B2 (ja) * 1994-07-20 2006-08-16 富士通株式会社 キュー装置
US5864677A (en) * 1996-07-01 1999-01-26 Sun Microsystems, Inc. System for preserving sequential ordering and supporting nonidempotent commands in a ring network with busy nodes
US5961623A (en) * 1996-08-29 1999-10-05 Apple Computer, Inc. Method and system for avoiding starvation and deadlocks in a split-response interconnect of a computer system

Also Published As

Publication number Publication date
US6604154B1 (en) 2003-08-05
JP2000174786A (ja) 2000-06-23

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