JP4015118B2 - 半導体装置 - Google Patents

半導体装置 Download PDF

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Publication number
JP4015118B2
JP4015118B2 JP2004012736A JP2004012736A JP4015118B2 JP 4015118 B2 JP4015118 B2 JP 4015118B2 JP 2004012736 A JP2004012736 A JP 2004012736A JP 2004012736 A JP2004012736 A JP 2004012736A JP 4015118 B2 JP4015118 B2 JP 4015118B2
Authority
JP
Japan
Prior art keywords
lead
semiconductor chip
support
semiconductor device
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2004012736A
Other languages
English (en)
Japanese (ja)
Other versions
JP2004158875A5 (enExample
JP2004158875A (ja
Inventor
茂樹 田中
敦 藤沢
宗一 長野
次彦 平野
亮一 太田
貴史 今野
堅一 建部
敏昭 岡本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2004012736A priority Critical patent/JP4015118B2/ja
Publication of JP2004158875A publication Critical patent/JP2004158875A/ja
Publication of JP2004158875A5 publication Critical patent/JP2004158875A5/ja
Application granted granted Critical
Publication of JP4015118B2 publication Critical patent/JP4015118B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP2004012736A 1996-03-18 2004-01-21 半導体装置 Expired - Fee Related JP4015118B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2004012736A JP4015118B2 (ja) 1996-03-18 2004-01-21 半導体装置

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP6042196 1996-03-18
JP2004012736A JP4015118B2 (ja) 1996-03-18 2004-01-21 半導体装置

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP9008964A Division JPH09312375A (ja) 1996-03-18 1997-01-21 リードフレーム、半導体装置及び半導体装置の製造方法

Publications (3)

Publication Number Publication Date
JP2004158875A JP2004158875A (ja) 2004-06-03
JP2004158875A5 JP2004158875A5 (enExample) 2005-09-15
JP4015118B2 true JP4015118B2 (ja) 2007-11-28

Family

ID=32827161

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004012736A Expired - Fee Related JP4015118B2 (ja) 1996-03-18 2004-01-21 半導体装置

Country Status (1)

Country Link
JP (1) JP4015118B2 (enExample)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6100648B2 (ja) 2013-08-28 2017-03-22 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法

Also Published As

Publication number Publication date
JP2004158875A (ja) 2004-06-03

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