JP3999759B2 - 基板及び電子機器 - Google Patents
基板及び電子機器 Download PDFInfo
- Publication number
- JP3999759B2 JP3999759B2 JP2004110583A JP2004110583A JP3999759B2 JP 3999759 B2 JP3999759 B2 JP 3999759B2 JP 2004110583 A JP2004110583 A JP 2004110583A JP 2004110583 A JP2004110583 A JP 2004110583A JP 3999759 B2 JP3999759 B2 JP 3999759B2
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- Prior art keywords
- electronic component
- substrate
- bumps
- mounting
- metal pattern
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- Expired - Fee Related
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/98—Methods for disconnecting semiconductor or solid-state bodies
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/1012—Auxiliary members for bump connectors, e.g. spacers
- H01L2224/10152—Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/10165—Alignment aids
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/81052—Detaching bump connectors, e.g. after testing
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- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8112—Aligning
- H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
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- H01L2224/81136—Aligning involving guiding structures, e.g. spacers or supporting members
- H01L2224/81138—Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
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- H01L2224/812—Applying energy for connecting
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- H01L2924/013—Alloys
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- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09736—Varying thickness of a single conductor; Conductors in the same plane having different thicknesses
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10015—Non-printed capacitor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10734—Ball grid array [BGA]; Bump grid array
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0195—Tool for a process not provided for in H05K3/00, e.g. tool for handling objects using suction, for deforming objects, for applying local pressure
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3494—Heating methods for reflowing of solder
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Description
前記突設部に設けられた位置決め部に前記電子部品のパッケージを当接しつつ該電子部品を位置決めして前記基板上に載置するステップと、前記突設部に設けられた加熱部に加熱を行うステップと、前記突設部に設けられた検査部を用いて前記電子部品と前記金属パターンとを接合を検査するステップとを有することを特徴とする実装方法。
4:バンプ
6:基板
6a:基材
8:パッド
10:パッケージ
12〜15:金属パターン
12a〜15a:突設部(位置決め部、検査部、加熱部)
12b,15b:側面
16:テスターの端子
18:半田ゴテ(加熱手段)
Claims (5)
- 2次元に配列されたバンプを有する電子部品を実装するために表面に前記バンプと接合される金属パターンが形成された基板であって、
前記金属パターンは、前記バンプのうち電位が等しい複数のバンプを導通するように前記表面に形成され、かつ前記電子部品のパッケージよりも外側に延長されて突設部を有することを特徴とする基板。 - 前記突設部が、前記金属パターンに接合する複数の前記バンプが有する半田を溶融するために加熱手段に当接する加熱部を有することを特徴とする請求項1に記載の基板。
- 前記突設部が、前記電子部品のパッケージに当接して該電子部品の位置決めを行う位置決め部を有することを特徴とする請求項1に記載の基板。
- 前記突設部が、前記電子部品と前記金属パターンとの接合を検査する検査部を有することを特徴とする請求項1に記載の基板。
- 請求項1から請求項4のうちいずれか1項に記載の基板に前記電子部品が実装されて使用される電子機器。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004110583A JP3999759B2 (ja) | 2004-04-02 | 2004-04-02 | 基板及び電子機器 |
US10/948,231 US7411295B2 (en) | 2004-04-02 | 2004-09-24 | Circuit board, device mounting structure, device mounting method, and electronic apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004110583A JP3999759B2 (ja) | 2004-04-02 | 2004-04-02 | 基板及び電子機器 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005294710A JP2005294710A (ja) | 2005-10-20 |
JP3999759B2 true JP3999759B2 (ja) | 2007-10-31 |
Family
ID=35059774
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004110583A Expired - Fee Related JP3999759B2 (ja) | 2004-04-02 | 2004-04-02 | 基板及び電子機器 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7411295B2 (ja) |
JP (1) | JP3999759B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10269762B2 (en) * | 2015-10-29 | 2019-04-23 | Taiwan Semiconductor Manufacturing Company, Ltd. | Rework process and tool design for semiconductor package |
DE102018212273A1 (de) * | 2018-07-24 | 2020-01-30 | Robert Bosch Gmbh | Elektronikeinheit |
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SG104279A1 (en) * | 2001-11-02 | 2004-06-21 | Inst Of Microelectronics | Enhanced chip scale package for flip chips |
JP2003168736A (ja) * | 2001-11-30 | 2003-06-13 | Hitachi Ltd | 半導体素子及び高周波電力増幅装置並びに無線通信機 |
US6680529B2 (en) * | 2002-02-15 | 2004-01-20 | Advanced Semiconductor Engineering, Inc. | Semiconductor build-up package |
JP2003258149A (ja) | 2002-02-28 | 2003-09-12 | Denso Corp | エリア配置型半導体装置の配線構造 |
SG121707A1 (en) * | 2002-03-04 | 2006-05-26 | Micron Technology Inc | Method and apparatus for flip-chip packaging providing testing capability |
KR100588029B1 (ko) * | 2002-03-07 | 2006-06-12 | 제이에스알 가부시끼가이샤 | 이방 도전성 커넥터 및 그 제조 방법 및 회로 장치의 검사장치 |
US7474538B2 (en) * | 2002-05-27 | 2009-01-06 | Nec Corporation | Semiconductor device mounting board, method of manufacturing the same, method of inspecting the same, and semiconductor package |
JP3848210B2 (ja) * | 2002-05-29 | 2006-11-22 | キヤノン株式会社 | 電子回路基板 |
US20040016995A1 (en) * | 2002-07-25 | 2004-01-29 | Kuo Shun Meen | MEMS control chip integration |
JP4057921B2 (ja) * | 2003-01-07 | 2008-03-05 | 株式会社東芝 | 半導体装置およびそのアセンブリ方法 |
DE10343256B4 (de) * | 2003-09-17 | 2006-08-10 | Infineon Technologies Ag | Anordnung zur Herstellung einer elektrischen Verbindung zwischen einem BGA-Package und einer Signalquelle, sowie Verfahren zum Herstellen einer solchen Verbindung |
-
2004
- 2004-04-02 JP JP2004110583A patent/JP3999759B2/ja not_active Expired - Fee Related
- 2004-09-24 US US10/948,231 patent/US7411295B2/en not_active Expired - Fee Related
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US20050224971A1 (en) | 2005-10-13 |
JP2005294710A (ja) | 2005-10-20 |
US7411295B2 (en) | 2008-08-12 |
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