JP3944451B2 - メモリセルの強誘電体トランジスタから状態を読み出す、および、強誘電体トランジスタに状態を格納する方法、ならびに、メモリマトリックス - Google Patents

メモリセルの強誘電体トランジスタから状態を読み出す、および、強誘電体トランジスタに状態を格納する方法、ならびに、メモリマトリックス Download PDF

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JP3944451B2
JP3944451B2 JP2002551859A JP2002551859A JP3944451B2 JP 3944451 B2 JP3944451 B2 JP 3944451B2 JP 2002551859 A JP2002551859 A JP 2002551859A JP 2002551859 A JP2002551859 A JP 2002551859A JP 3944451 B2 JP3944451 B2 JP 3944451B2
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Japan
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ferroelectric transistor
ferroelectric
transistor
unselected
voltage
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Expired - Fee Related
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JP2002551859A
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Japanese (ja)
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JP2004516604A (ja
Inventor
ホルガー ゲーベル，
ハインツ ヘニングシュミット，
ヴォルフガング ヘーンライン，
トーマス ハーネダー，
マルク ウルマン，
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Infineon Technologies AG
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Infineon Technologies AG
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S977/00—Nanotechnology
    • Y10S977/902—Specified use of nanostructure
    • Y10S977/932—Specified use of nanostructure for electronic or optoelectronic application
    • Y10S977/943—Information storage or retrieval using nanostructure
JP2002551859A 2000-12-21 2001-12-19 メモリセルの強誘電体トランジスタから状態を読み出す、および、強誘電体トランジスタに状態を格納する方法、ならびに、メモリマトリックス Expired - Fee Related JP3944451B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10064031A DE10064031A1 (de) 2000-12-21 2000-12-21 Verfahren zum Auslesen und Speichern eines Zustandes aus einem oder in einen ferroelektrischen Transistor einer Speicherzelle und Speichermatrix
PCT/DE2001/004785 WO2002050842A2 (de) 2000-12-21 2001-12-19 Verfahren zum auslesen und speichern eines zustandes aus einem oder in einen ferroelektrischen transistor einer speicherzelle und speichermatrix

Publications (2)

Publication Number Publication Date
JP2004516604A JP2004516604A (ja) 2004-06-03
JP3944451B2 true JP3944451B2 (ja) 2007-07-11

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JP2002551859A Expired - Fee Related JP3944451B2 (ja) 2000-12-21 2001-12-19 メモリセルの強誘電体トランジスタから状態を読み出す、および、強誘電体トランジスタに状態を格納する方法、ならびに、メモリマトリックス

Country Status (8)

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US (1) US6944044B2 (de)
EP (1) EP1344222B1 (de)
JP (1) JP3944451B2 (de)
KR (1) KR100559009B1 (de)
CN (1) CN1227672C (de)
DE (2) DE10064031A1 (de)
TW (1) TW563128B (de)
WO (1) WO2002050842A2 (de)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5240596B2 (ja) * 2005-04-22 2013-07-17 独立行政法人産業技術総合研究所 半導体集積回路
US8941191B2 (en) 2010-07-30 2015-01-27 Cornell University Method of actuating an internally transduced pn-diode-based ultra high frequency micromechanical resonator
IT1403803B1 (it) * 2011-02-01 2013-10-31 St Microelectronics Srl Supporto di memorizzazione provvisto di elementi di memoria di materiale ferroelettrico e relativo metodo di programmazione
ITTO20110181A1 (it) * 2011-02-01 2012-08-02 St Microelectronics Srl Supporto di memorizzazione provvisto di elementi di materiale ferroelettrico e relativo metodo di lettura non distruttiva
CN109087949A (zh) * 2017-06-14 2018-12-25 萨摩亚商费洛储存科技股份有限公司 铁电场效应晶体管、铁电内存与数据读写方法及制造方法
US10838831B2 (en) * 2018-05-14 2020-11-17 Micron Technology, Inc. Die-scope proximity disturb and defect remapping scheme for non-volatile memory
US11055167B2 (en) * 2018-05-14 2021-07-06 Micron Technology, Inc. Channel-scope proximity disturb and defect remapping scheme for non-volatile memory
DE102020203024A1 (de) * 2020-03-10 2021-09-16 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung eingetragener Verein Widerstandsnetzwerk

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745794A (ja) * 1993-07-26 1995-02-14 Olympus Optical Co Ltd 強誘電体メモリの駆動方法
KR100243294B1 (ko) * 1997-06-09 2000-02-01 윤종용 반도체장치의 강유전체 메모리 셀 및 어레이
US6067244A (en) * 1997-10-14 2000-05-23 Yale University Ferroelectric dynamic random access memory
US6515889B1 (en) * 2000-08-31 2003-02-04 Micron Technology, Inc. Junction-isolated depletion mode ferroelectric memory

Also Published As

Publication number Publication date
KR20030064863A (ko) 2003-08-02
WO2002050842A2 (de) 2002-06-27
US6944044B2 (en) 2005-09-13
EP1344222B1 (de) 2004-10-20
TW563128B (en) 2003-11-21
DE50104250D1 (de) 2004-11-25
JP2004516604A (ja) 2004-06-03
CN1227672C (zh) 2005-11-16
CN1481558A (zh) 2004-03-10
WO2002050842A3 (de) 2002-12-27
EP1344222A2 (de) 2003-09-17
DE10064031A1 (de) 2002-07-18
KR100559009B1 (ko) 2006-03-10
US20040076057A1 (en) 2004-04-22

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