JP3904737B2 - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法 Download PDFInfo
- Publication number
- JP3904737B2 JP3904737B2 JP23174098A JP23174098A JP3904737B2 JP 3904737 B2 JP3904737 B2 JP 3904737B2 JP 23174098 A JP23174098 A JP 23174098A JP 23174098 A JP23174098 A JP 23174098A JP 3904737 B2 JP3904737 B2 JP 3904737B2
- Authority
- JP
- Japan
- Prior art keywords
- input
- output
- signal
- circuit
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318566—Comparators; Diagnosing the device under test
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
- G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
- G01R31/318572—Input/Output interfaces
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Tests Of Electronic Circuits (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23174098A JP3904737B2 (ja) | 1998-08-18 | 1998-08-18 | 半導体装置及びその製造方法 |
| US09/233,209 US6329669B1 (en) | 1998-08-18 | 1999-01-20 | Semiconductor device able to test changeover circuit which switches connection between terminals |
| KR10-1999-0013814A KR100490495B1 (ko) | 1998-08-18 | 1999-04-19 | 반도체 장치 및 반도체 장치의 테스트 방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23174098A JP3904737B2 (ja) | 1998-08-18 | 1998-08-18 | 半導体装置及びその製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2000065900A JP2000065900A (ja) | 2000-03-03 |
| JP2000065900A5 JP2000065900A5 (enExample) | 2005-09-29 |
| JP3904737B2 true JP3904737B2 (ja) | 2007-04-11 |
Family
ID=16928305
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23174098A Expired - Fee Related JP3904737B2 (ja) | 1998-08-18 | 1998-08-18 | 半導体装置及びその製造方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US6329669B1 (enExample) |
| JP (1) | JP3904737B2 (enExample) |
| KR (1) | KR100490495B1 (enExample) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101365956A (zh) * | 2006-01-09 | 2009-02-11 | Nxp股份有限公司 | 可测试的集成电路及集成电路的测试方法 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5772341A (en) * | 1980-10-24 | 1982-05-06 | Toshiba Corp | Semiconductor integrated circuit device |
| JPH01111364A (ja) * | 1987-10-24 | 1989-04-28 | Nec Corp | 半導体集積回路装置の信号切換回路 |
| JP2672408B2 (ja) * | 1991-03-19 | 1997-11-05 | シャープ株式会社 | 半導体集積回路 |
| JPH05264647A (ja) | 1992-03-18 | 1993-10-12 | Nec Corp | 半導体装置のテスト回路 |
| JP2869314B2 (ja) | 1992-11-25 | 1999-03-10 | 松下電器産業株式会社 | バウンダリースキャンセル回路,バウンダリースキャンテスト回路及びその使用方法 |
| JP3099739B2 (ja) | 1996-06-21 | 2000-10-16 | 日本電気株式会社 | 半導体記憶装置 |
| JPH10303366A (ja) * | 1997-04-30 | 1998-11-13 | Mitsubishi Electric Corp | 半導体装置 |
-
1998
- 1998-08-18 JP JP23174098A patent/JP3904737B2/ja not_active Expired - Fee Related
-
1999
- 1999-01-20 US US09/233,209 patent/US6329669B1/en not_active Expired - Fee Related
- 1999-04-19 KR KR10-1999-0013814A patent/KR100490495B1/ko not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| KR20000016855A (ko) | 2000-03-25 |
| US6329669B1 (en) | 2001-12-11 |
| KR100490495B1 (ko) | 2005-05-19 |
| JP2000065900A (ja) | 2000-03-03 |
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| A01 | Written decision to grant a patent or to grant a registration (utility model) |
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| A61 | First payment of annual fees (during grant procedure) |
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| R150 | Certificate of patent or registration of utility model |
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| LAPS | Cancellation because of no payment of annual fees |