JP3846748B2 - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP3846748B2
JP3846748B2 JP18761396A JP18761396A JP3846748B2 JP 3846748 B2 JP3846748 B2 JP 3846748B2 JP 18761396 A JP18761396 A JP 18761396A JP 18761396 A JP18761396 A JP 18761396A JP 3846748 B2 JP3846748 B2 JP 3846748B2
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JP
Japan
Prior art keywords
data
output
signal
output node
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP18761396A
Other languages
English (en)
Japanese (ja)
Other versions
JPH1031893A (ja
JPH1031893A5 (enExample
Inventor
真一 増田
隆 橋本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Mitsubishi Electric Engineering Co Ltd
Original Assignee
Renesas Technology Corp
Mitsubishi Electric Engineering Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Technology Corp, Mitsubishi Electric Engineering Co Ltd filed Critical Renesas Technology Corp
Priority to JP18761396A priority Critical patent/JP3846748B2/ja
Priority to US08/756,822 priority patent/US5710736A/en
Publication of JPH1031893A publication Critical patent/JPH1031893A/ja
Publication of JPH1031893A5 publication Critical patent/JPH1031893A5/ja
Application granted granted Critical
Publication of JP3846748B2 publication Critical patent/JP3846748B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
    • G11C11/417—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the field-effect type
    • G11C11/419—Read-write [R-W] circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP18761396A 1996-07-17 1996-07-17 半導体記憶装置 Expired - Fee Related JP3846748B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP18761396A JP3846748B2 (ja) 1996-07-17 1996-07-17 半導体記憶装置
US08/756,822 US5710736A (en) 1996-07-17 1996-11-26 Semiconductor storage device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18761396A JP3846748B2 (ja) 1996-07-17 1996-07-17 半導体記憶装置

Publications (3)

Publication Number Publication Date
JPH1031893A JPH1031893A (ja) 1998-02-03
JPH1031893A5 JPH1031893A5 (enExample) 2004-07-15
JP3846748B2 true JP3846748B2 (ja) 2006-11-15

Family

ID=16209179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18761396A Expired - Fee Related JP3846748B2 (ja) 1996-07-17 1996-07-17 半導体記憶装置

Country Status (2)

Country Link
US (1) US5710736A (enExample)
JP (1) JP3846748B2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100322535B1 (ko) * 1999-06-29 2002-03-18 윤종용 소비전력을 최소화하는 메모리 장치 및 이를 이용한 데이터 기입 및 독출방법
JP3723477B2 (ja) * 2001-09-06 2005-12-07 松下電器産業株式会社 半導体記憶装置
DE10219649C1 (de) * 2002-05-02 2003-11-27 Infineon Technologies Ag Differentielle Strombewerterschaltung und Leseverstärkerschaltung zum Bewerten eines Speicherzustands einer SRAM-Halbleiterspeicherzelle
JP2006053981A (ja) * 2004-08-11 2006-02-23 Fujitsu Ltd 記憶装置、記憶装置リード方法
DE112011105901B4 (de) * 2011-11-30 2018-06-07 Intel Corporation Verfahren und Vorrichtung zur Energieeinsparung für First In First Out (FIF0)-Speicher
US10978139B2 (en) * 2019-06-04 2021-04-13 Qualcomm Incorporated Dual-mode high-bandwidth SRAM with self-timed clock circuit

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2648840B2 (ja) * 1988-11-22 1997-09-03 株式会社日立製作所 半導体記憶装置
JPH02154392A (ja) * 1988-12-07 1990-06-13 Hitachi Ltd 半導体集積回路
JP3037377B2 (ja) * 1990-08-27 2000-04-24 沖電気工業株式会社 半導体記憶装置
JPH05274885A (ja) * 1992-03-26 1993-10-22 Nec Corp 半導体記憶装置
KR960009953B1 (ko) * 1994-01-27 1996-07-25 삼성전자 주식회사 반도체 메모리 장치의 센스앰프 제어회로
US5642317A (en) * 1995-05-16 1997-06-24 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device incorporating a test mechanism

Also Published As

Publication number Publication date
JPH1031893A (ja) 1998-02-03
US5710736A (en) 1998-01-20

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