JPH1031893A5 - - Google Patents
Info
- Publication number
- JPH1031893A5 JPH1031893A5 JP1996187613A JP18761396A JPH1031893A5 JP H1031893 A5 JPH1031893 A5 JP H1031893A5 JP 1996187613 A JP1996187613 A JP 1996187613A JP 18761396 A JP18761396 A JP 18761396A JP H1031893 A5 JPH1031893 A5 JP H1031893A5
- Authority
- JP
- Japan
- Prior art keywords
- data
- output
- signal
- node
- detecting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18761396A JP3846748B2 (ja) | 1996-07-17 | 1996-07-17 | 半導体記憶装置 |
| US08/756,822 US5710736A (en) | 1996-07-17 | 1996-11-26 | Semiconductor storage device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18761396A JP3846748B2 (ja) | 1996-07-17 | 1996-07-17 | 半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH1031893A JPH1031893A (ja) | 1998-02-03 |
| JPH1031893A5 true JPH1031893A5 (enExample) | 2004-07-15 |
| JP3846748B2 JP3846748B2 (ja) | 2006-11-15 |
Family
ID=16209179
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18761396A Expired - Fee Related JP3846748B2 (ja) | 1996-07-17 | 1996-07-17 | 半導体記憶装置 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US5710736A (enExample) |
| JP (1) | JP3846748B2 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100322535B1 (ko) * | 1999-06-29 | 2002-03-18 | 윤종용 | 소비전력을 최소화하는 메모리 장치 및 이를 이용한 데이터 기입 및 독출방법 |
| JP3723477B2 (ja) * | 2001-09-06 | 2005-12-07 | 松下電器産業株式会社 | 半導体記憶装置 |
| DE10219649C1 (de) * | 2002-05-02 | 2003-11-27 | Infineon Technologies Ag | Differentielle Strombewerterschaltung und Leseverstärkerschaltung zum Bewerten eines Speicherzustands einer SRAM-Halbleiterspeicherzelle |
| JP2006053981A (ja) * | 2004-08-11 | 2006-02-23 | Fujitsu Ltd | 記憶装置、記憶装置リード方法 |
| DE112011105901B4 (de) * | 2011-11-30 | 2018-06-07 | Intel Corporation | Verfahren und Vorrichtung zur Energieeinsparung für First In First Out (FIF0)-Speicher |
| US10978139B2 (en) * | 2019-06-04 | 2021-04-13 | Qualcomm Incorporated | Dual-mode high-bandwidth SRAM with self-timed clock circuit |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2648840B2 (ja) * | 1988-11-22 | 1997-09-03 | 株式会社日立製作所 | 半導体記憶装置 |
| JPH02154392A (ja) * | 1988-12-07 | 1990-06-13 | Hitachi Ltd | 半導体集積回路 |
| JP3037377B2 (ja) * | 1990-08-27 | 2000-04-24 | 沖電気工業株式会社 | 半導体記憶装置 |
| JPH05274885A (ja) * | 1992-03-26 | 1993-10-22 | Nec Corp | 半導体記憶装置 |
| KR960009953B1 (ko) * | 1994-01-27 | 1996-07-25 | 삼성전자 주식회사 | 반도체 메모리 장치의 센스앰프 제어회로 |
| US5642317A (en) * | 1995-05-16 | 1997-06-24 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor memory device incorporating a test mechanism |
-
1996
- 1996-07-17 JP JP18761396A patent/JP3846748B2/ja not_active Expired - Fee Related
- 1996-11-26 US US08/756,822 patent/US5710736A/en not_active Expired - Fee Related
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