JP3839215B2 - 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム - Google Patents

誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム Download PDF

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Publication number
JP3839215B2
JP3839215B2 JP2000070824A JP2000070824A JP3839215B2 JP 3839215 B2 JP3839215 B2 JP 3839215B2 JP 2000070824 A JP2000070824 A JP 2000070824A JP 2000070824 A JP2000070824 A JP 2000070824A JP 3839215 B2 JP3839215 B2 JP 3839215B2
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Japan
Prior art keywords
error
data
main memory
code
failure information
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Expired - Fee Related
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JP2000070824A
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Japanese (ja)
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JP2001256068A (ja
JP2001256068A5 (enExample
Inventor
剛 田中
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Hitachi Ltd
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Hitachi Ltd
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Priority to JP2000070824A priority Critical patent/JP3839215B2/ja
Priority to US09/805,169 priority patent/US6779148B2/en
Publication of JP2001256068A publication Critical patent/JP2001256068A/ja
Publication of JP2001256068A5 publication Critical patent/JP2001256068A5/ja
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00—Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05—Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/13—Linear codes
    • H03M13/15—Cyclic codes, i.e. cyclic shifts of codewords produce other codewords, e.g. codes defined by a generator polynomial, Bose-Chaudhuri-Hocquenghem [BCH] codes

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Algebra (AREA)
  • General Engineering & Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Mathematical Physics (AREA)
  • Pure & Applied Mathematics (AREA)
  • Probability & Statistics with Applications (AREA)
  • Detection And Correction Of Errors (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Error Detection And Correction (AREA)
JP2000070824A 2000-03-14 2000-03-14 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム Expired - Fee Related JP3839215B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000070824A JP3839215B2 (ja) 2000-03-14 2000-03-14 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム
US09/805,169 US6779148B2 (en) 2000-03-14 2001-03-14 Error detection and correction method in a computer system and main memory controller of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000070824A JP3839215B2 (ja) 2000-03-14 2000-03-14 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム

Publications (3)

Publication Number Publication Date
JP2001256068A JP2001256068A (ja) 2001-09-21
JP2001256068A5 JP2001256068A5 (enExample) 2005-03-17
JP3839215B2 true JP3839215B2 (ja) 2006-11-01

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JP2000070824A Expired - Fee Related JP3839215B2 (ja) 2000-03-14 2000-03-14 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム

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US (1) US6779148B2 (enExample)
JP (1) JP3839215B2 (enExample)

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EP1296207B1 (de) * 2001-09-25 2014-08-27 Siemens Aktiengesellschaft HMI Gerät und Verfahren zur Bedienung einer technischen Einrichtung, Automatisierungssystem mit HMI Gerät und Computerprogrammprodukt mit Programm zur Durchführung des Verfahrens in einem HMI Gerät oder Automatisierungssystem
US7278083B2 (en) * 2003-06-27 2007-10-02 International Business Machines Corporation Method and system for optimized instruction fetch to protect against soft and hard errors
US8176250B2 (en) * 2003-08-29 2012-05-08 Hewlett-Packard Development Company, L.P. System and method for testing a memory
US7346755B2 (en) * 2003-09-16 2008-03-18 Hewlett-Packard Development, L.P. Memory quality assurance
US7171591B2 (en) * 2003-12-23 2007-01-30 International Business Machines Corporation Method and apparatus for encoding special uncorrectable errors in an error correction code
US7404118B1 (en) * 2004-09-02 2008-07-22 Sun Microsystems, Inc. Memory error analysis for determining potentially faulty memory components
EP1862909A4 (en) * 2005-03-24 2009-09-09 Fujitsu Ltd MEMORY ADDRESS MANAGEMENT THROUGH FIRMWARE
US9459960B2 (en) 2005-06-03 2016-10-04 Rambus Inc. Controller device for use with electrically erasable programmable memory chip with error detection and retry modes of operation
US7831882B2 (en) 2005-06-03 2010-11-09 Rambus Inc. Memory system with error detection and retry modes of operation
US7562285B2 (en) 2006-01-11 2009-07-14 Rambus Inc. Unidirectional error code transfer for a bidirectional data link
US8352805B2 (en) 2006-05-18 2013-01-08 Rambus Inc. Memory error detection
US20070271495A1 (en) * 2006-05-18 2007-11-22 Ian Shaeffer System to detect and identify errors in control information, read data and/or write data
US7506226B2 (en) * 2006-05-23 2009-03-17 Micron Technology, Inc. System and method for more efficiently using error correction codes to facilitate memory device testing
WO2009144799A1 (ja) * 2008-05-29 2009-12-03 富士通株式会社 クロスバスイッチシステム
JP5284069B2 (ja) * 2008-12-11 2013-09-11 株式会社東芝 メモリシステム及びメモリアクセス方法
JP5600963B2 (ja) * 2010-02-22 2014-10-08 富士通株式会社 不揮発性記憶装置、及びデータ初期化方法
JP2012124642A (ja) * 2010-12-07 2012-06-28 Fuji Xerox Co Ltd 受信装置、データ転送装置、及びプログラム
JP2012124643A (ja) * 2010-12-07 2012-06-28 Fuji Xerox Co Ltd 受信装置及びデータ転送装置
US8762821B2 (en) * 2012-03-30 2014-06-24 Intel Corporation Method of correcting adjacent errors by using BCH-based error correction coding
US8806295B2 (en) 2012-05-24 2014-08-12 International Business Machines Corporation Mis-correction and no-correction rates for error control
FR2992504A1 (fr) * 2012-06-26 2013-12-27 Commissariat Energie Atomique Dispositif et procede pour la correction d'erreurs dans un mot de code
JP6600146B2 (ja) * 2015-03-27 2019-10-30 ルネサスエレクトロニクス株式会社 データ処理回路及びエラー訂正方法
CN108664533A (zh) * 2017-04-02 2018-10-16 田雪松 编码图样信息的处理方法及装置
US10621038B2 (en) 2017-08-08 2020-04-14 Silicon Motion, Inc. Decoding method, associated flash memory controller and electronic device
CN111819547B (zh) 2018-03-26 2025-02-07 拉姆伯斯公司 命令/地址通道错误检测
CN110532127B (zh) * 2019-08-13 2023-03-03 南京芯驰半导体科技有限公司 一种差错校验位协议转换器
KR102633829B1 (ko) * 2021-12-30 2024-02-02 성균관대학교산학협력단 버스트 에러 정정 코드 생성 방법, 컴퓨터 판독 가능한 기록 매체, 컴퓨터 프로그램 및 장치
US11804859B2 (en) * 2022-01-20 2023-10-31 Hewlett Packard Enterprise Development Lp Analog error detection and correction in analog in-memory crossbars

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US5459742A (en) * 1992-06-11 1995-10-17 Quantum Corporation Solid state disk memory using storage devices with defects
JP2665113B2 (ja) 1992-09-07 1997-10-22 株式会社日立製作所 計算機システムと主メモリ制御装置
US6003144A (en) * 1997-06-30 1999-12-14 Compaq Computer Corporation Error detection and correction

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Publication number Publication date
JP2001256068A (ja) 2001-09-21
US6779148B2 (en) 2004-08-17
US20010025359A1 (en) 2001-09-27

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